Abstract: Described herein are ferroelectric (FE) memory cells that include transistors having gate stacks separate from FE capacitors of these cells. An example memory cell may be implemented as an IC device that includes a support structure (e.g., a substrate) and a transistor provided over the support structure and including a gate stack. The IC device also includes a FE capacitor having a first capacitor electrode, a second capacitor electrode, and a capacitor insulator of a FE material between the first capacitor electrode and the second capacitor electrode, where the FE capacitor is separate from the gate stack (i.e., is not integrated within the gate stack and does not have any layers that are part of the gate stack). The IC device further includes an interconnect structure, configured to electrically couple the gate stack and the first capacitor electrode.

Abstract: The present invention provides a manufacturing method of a curved circuit board which includes the following steps. The first step is to provide a flexible substrate. The next step is to form a patterned catalyst layer on the flexible substrate. The next step is to deposit metal on the patterned catalyst layer by electroless plating to form a wiring substrate, wherein the wiring substrate includes a planar wiring structure. The last step is to place the wiring substrate into a mold having a molding surface with a three-dimensional design, and then execute a heating process to shape the planar wiring structure to a three-dimensional wiring structure, wherein the heated wiring substrate is laminated to the molding surface of the mold. The present invention further provides an electronic product using the curved circuit board.