Patents by Inventor Chia-Chiung TSAI

Chia-Chiung TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hybrid bonding mechanisms for semiconductor wafers
    Patent number: 9142517
    Abstract: The embodiments of diffusion barrier layer described above provide mechanisms for forming a copper diffusion barrier layer to prevent device degradation for hybrid bonding of wafers. The diffusion barrier layer(s) encircles the copper-containing conductive pads used for hybrid bonding. The diffusion barrier layer can be on one of the two bonding wafers or on both bonding wafers.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: September 22, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Yin Liu, Szu-Ying Chen, Chen-Jong Wang, Chih-Hui Huang, Xin-Hua Huang, Lan-Lin Chao, Yeur-Luen Tu, Chia-Chiung Tsai, Xiaomeng Chen
  • HYBRID BONDING MECHANISMS FOR SEMICONDUCTOR WAFERS
    Publication number: 20140117546
    Abstract: The embodiments of diffusion barrier layer described above provide mechanisms for forming a copper diffusion barrier layer to prevent device degradation for hybrid bonding of wafers. The diffusion barrier layer(s) encircles the copper-containing conductive pads used for hybrid bonding. The diffusion barrier layer can be on one of the two bonding wafers or on both bonding wafers.
    Type: Application
    Filed: October 31, 2012
    Publication date: May 1, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Yin LIU, Szu-Ying CHEN, Chen-Jong WANG, Chih-Hui HUANG, Xin-Hua HUANG, Lan-Lin CHAO, Yeur-Luen TU, Chia-Chiung TSAI, Xiaomeng CHEN