Patents by Inventor Chia-Chu Kuo

Chia-Chu Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087877
    Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Tsung-Te CHIU, Kechuang LIN, Houng-Chi WEI, Chia-Chu KUO, Bing-Han CHUANG
  • Patent number: 11823891
    Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: November 21, 2023
    Assignee: XIAMEN SANAN INTEGRATED CIRCUIT CO., LTD.
    Inventors: Tsung-Te Chiu, Kechuang Lin, Houng-Chi Wei, Chia-Chu Kuo, Bing-Han Chuang
  • Publication number: 20210134584
    Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, an aurum layer, and an electroplating copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.
    Type: Application
    Filed: October 28, 2020
    Publication date: May 6, 2021
    Inventors: Tsung-Te CHIU, Kechuang LIN, Houng-Chi WEI, Chia-Chu KUO, Bing-Han CHUANG
  • Patent number: 7241672
    Abstract: A method for annealing a semiconductor substrate. The method includes turning on at least one heat source, heating a semiconductor substrate in a chamber, turning off the at least one heat source, and cooling the semiconductor substrate in the chamber. The heating a semiconductor substrate includes absorbing an energy from the at least one heat source by the semiconductor substrate. Moreover, the cooling the semiconductor substrate includes flowing a first gas in a vicinity of at least one wall of the chamber, flowing a second gas in a vicinity of the at least one heat source, and flowing a third gas in a vicinity of the semiconductor substrate.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: July 10, 2007
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: Chia-Chu Kuo
  • Publication number: 20050142868
    Abstract: A method for annealing a semiconductor substrate. The method includes turning on at least one heat source, heating a semiconductor substrate in a chamber, turning off the at least one heat source, and cooling the semiconductor substrate in the chamber. The heating a semiconductor substrate includes absorbing an energy from the at least one heat source by the semiconductor substrate. Moreover, the cooling the semiconductor substrate includes flowing a first gas in a vicinity of at least one wall of the chamber, flowing a second gas in a vicinity of the at least one heat source, and flowing a third gas in a vicinity of the semiconductor substrate.
    Type: Application
    Filed: February 6, 2004
    Publication date: June 30, 2005
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: Chia-Chu Kuo