Patents by Inventor Chia-chun Lai

Chia-chun Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985508
    Abstract: An RF fingerprint signal processing device configured for executing a machine learning algorithm on a plurality of input signals. The RF fingerprint signal processing device includes a receiver-feature determination circuit and a classifying determination circuit. The receiver-feature determination circuit is configured to compute on the plurality of input signals in a neural network. The classifying determination circuit is coupled with the receiver-feature determination circuit, and the classifying determination circuit is configured to send feedback information of a receiver-feature component to the receiver-feature determination circuit. The receiver-feature determination circuit decreases the receiver-feature weight of the neural network. The receiver-feature weight is associated with the receiver-feature component, and the receiver-feature weight which is decreased is applied for computing an output value of the neural network.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: May 14, 2024
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Ting-Yu Lin, Ping-Chun Chen, Chia-Min Lai
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Publication number: 20090255156
    Abstract: An illusionary light source device is disclosed. The illusionary light source device includes a light emitting unit and a picture layer. The picture layer can partially block and partially transmit the light from the light emitting unit. Blocking areas and transmitting areas of the picture layer can be properly arranged to form a picture. The picture is therefore presented by the transmitting light. The illusionary light source device further includes a partial-light-blocking layer. The partial-light-blocking layer also can partially block and partially transmit the light from the light emitting unit. The partial-light-blocking layer is disposed between the light emitting unit and the picture layer. Light is emitted through the partial-light-blocking layer and then presented on the picture layer. By the relative motion between any two of the light emitting unit, the partial-light-blocking layer and the picture layer, the picture layer presents a wonderful light show.
    Type: Application
    Filed: July 28, 2008
    Publication date: October 15, 2009
    Applicant: National Taiwan University of Science and Technology
    Inventors: Chia-chun Lai, Regina-weiyao Wang