Patents by Inventor Chia-Chun Sun

Chia-Chun Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11762536
    Abstract: A computer validates relationships between object classes in object models. The computer detects user input to join a first object class and a second object class corresponding to user-selected object icons. The computer also detects user selection of a first linking field from a plurality of data fields for the first object class and user selection of a second linking field from a plurality of data fields for the second object class. In response, the computer generates a relationship that connects the first object class and the second object class according to shared data values of the first linking field and the second linking field and displays a relationship summary, including information regarding cardinality of the relationship and information regarding referential integrity of the relationship. The computer also displays a visual connection between the user-selected object icons representing the first and second object classes.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: September 19, 2023
    Assignee: Tableau Software, LLC
    Inventors: Ewald Marcus Hofman, Allison Chia-Chun Sun
  • Publication number: 20230123086
    Abstract: A computer validates relationships between object classes in object models. The computer detects user input to join a first object class and a second object class corresponding to user-selected object icons. The computer also detects user selection of a first linking field from a plurality of data fields for the first object class and user selection of a second linking field from a plurality of data fields for the second object class. In response, the computer generates a relationship that connects the first object class and the second object class according to shared data values of the first linking field and the second linking field and displays a relationship summary, including information regarding cardinality of the relationship and information regarding referential integrity of the relationship. The computer also displays a visual connection between the user-selected object icons representing the first and second object classes.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 20, 2023
    Inventors: Ewald Marcus Hofman, Allison Chia-Chun Sun
  • Patent number: 11520463
    Abstract: A computer displays, in a user interface, a data field region and an object model visualization region that includes object model icons. The computer detects user input to join a first object class and a second object class and detects user selection of a first linking field and user selection of a second linking field. In response to receiving the user selection of the first linking field and the second linking field, the computer generates a relationship that connects the first object class and second object class according to shared data values of the first linking field and the second linking field. The computer also displays, in the data field region, information regarding cardinality of the relationship and information regarding referential integrity of the relationship. The computer also updates the object model visualization region to display a visual connection between the object icons representing the first and second object classes.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: December 6, 2022
    Assignee: TABLEAU SOFTWARE, LLC
    Inventors: Ewald Marcus Hofman, Allison Chia-Chun Sun
  • Patent number: 11232120
    Abstract: A method for analyzing data from data sources includes receiving user selection of a data source and displaying an interface that includes a schema region and a search box. Each data field in the schema region is associated with a respective system-defined object from the data source. The method also includes receiving user input in the search box. The user input includes a predefined contiguous string of characters specifying a search parameter. The method also includes, in response to the user input in the search box, filtering the data fields displayed in the schema region, thereby displaying only data fields whose data type matches the data type specified by the search parameter.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: January 25, 2022
    Assignee: TABLEAU SOFTWARE, LLC
    Inventors: Thomas Nhan, Elaine Weatherfield Sulc, Nylah Ann McClellan DePass, Susan Denise Doan, Allison Chia-Chun Sun
  • Patent number: 9166003
    Abstract: A layout configuration for a memory cell array includes at least a comb-like doped region having a first conductivity type and a fishbone-shaped doped region having a second conductivity type. The second conductivity type and the first conductivity type are complementary. Furthermore, the comb-like doped region and the fishbone-shaped doped region are interdigitated.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: October 20, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Meng-Ping Chuang, Yu-Tse Kuo, Chia-Chun Sun, Yun-San Huang
  • Publication number: 20140035111
    Abstract: A layout configuration for a memory cell array includes at least a comb-like doped region having a first conductivity type and a fishbone-shaped doped region having a second conductivity type. The second conductivity type and the first conductivity type are complementary. Furthermore, the comb-like doped region and the fishbone-shaped doped region are interdigitated.
    Type: Application
    Filed: October 25, 2013
    Publication date: February 6, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Meng-Ping Chuang, Yu-Tse Kuo, Chia-Chun Sun, Yun-San Huang
  • Patent number: 8614463
    Abstract: A layout configuration for a memory cell array includes at least a comb-like doped region having a first conductivity type and a fishbone-shaped doped region having a second conductivity type. The second conductivity type and the first conductivity type are complementary. Furthermore, the comb-like doped region and the fishbone-shaped doped region are interdigitated.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: December 24, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Meng-Ping Chuang, Yu-Tse Kuo, Chia-Chun Sun, Yun-San Huang
  • Patent number: 8546890
    Abstract: An inverter structure is disclosed. The inverter structure includes an NMOS transistor and a PMOS transistor. Preferably, the NMOS transistor includes an n-type gate electrode and an n-type source/drain region, and the PMOS transistor includes a p-type gate electrode and a p-type source/drain region. Specifically, the n-type gate electrode and the p-type gate electrode are physically separated and electrically connected by a conductive contact.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: October 1, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Li Kuo, Chia-Chun Sun, Chuan-Hsien Fu, Chun-Liang Hou, Yun-San Huang
  • Publication number: 20130105864
    Abstract: A layout configuration for a memory cell array includes at least a comb-like doped region having a first conductivity type and a fishbone-shaped doped region having a second conductivity type. The second conductivity type and the first conductivity type are complementary. Furthermore, the comb-like doped region and the fishbone-shaped doped region are interdigitated.
    Type: Application
    Filed: November 2, 2011
    Publication date: May 2, 2013
    Inventors: Meng-Ping Chuang, Yu-Tse Kuo, Chia-Chun Sun, Yun-San Huang
  • Publication number: 20130038336
    Abstract: A calibration device applied for a test apparatus with at least a first probe and a second probe, the calibration device comprising: a first testing region and a second testing region, the first testing region and the second testing region divides into n×n sensing units respectively, the first testing region for generating n×n average electricity corresponding to a contact degree of the first probe contacted with the calibration device, and the second testing region for generating another n×n average electricity corresponding to a contact degree of the second probe contacted with the calibration device, and the pitch is the distance between the center of the first testing region to the center of the second testing region that is the same as that of the center of the first probe to the center of the second probe.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Jie-Wei SUN, Chao-Hsien Wu, Chia-Chun Sun, Yun-San Huang, Chien-Li Kuo
  • Publication number: 20100127337
    Abstract: An inverter structure is disclosed. The inverter structure includes an NMOS transistor and a PMOS transistor. Preferably, the NMOS transistor includes an n-type gate electrode and an n-type source/drain region, and the PMOS transistor includes a p-type gate electrode and a p-type source/drain region. Specifically, the n-type gate electrode and the p-type gate electrode are physically separated and electrically connected by a conductive contact.
    Type: Application
    Filed: November 27, 2008
    Publication date: May 27, 2010
    Inventors: Chien-Li Kuo, Chia-Chun Sun, Chuan-Hsien Fu, Chun-Liang Hou, Yun-San Huang