Abstract: The present invention relates to a method of making a cavity substrate. In accordance with a preferred embodiment, the method includes: providing a sacrificial carrier and optionally an electrical pad that extends from the sacrificial carrier in the first vertical direction; providing a dielectric layer that covers the sacrificial carrier in the first vertical direction; removing a selected portion of the sacrificial carrier; attaching a stiffener to the dielectric layer from the second vertical direction; forming a build-up circuitry from the first vertical direction; and removing the remaining portion of the sacrificial carrier to expose electrical contacts from the second vertical direction. A semiconductor device can be mounted on the cavity substrate and electrically connected to the electrical contacts within the built-in cavity of the cavity substrate. The stiffener can provide mechanical support for the build-up circuitry and the semiconductor device.

Abstract: The present invention relates to a method of making a semiconductor assembly. In accordance with a preferred embodiment, the method includes: preparing a dielectric layer and a supporting board including a stiffener, a bump/flange sacrificial carrier and an adhesive, wherein the adhesive bonds the stiffener to the sacrificial carrier and the dielectric layer covers the supporting board; then removing the bump and a portion of the flange to form a cavity and expose the dielectric layer; then mounting a semiconductor device into the cavity; and then forming a build-up circuitry that includes a first conductive via in direct contact with the semiconductor device and provides signal routing for the semiconductor device. Accordingly, the direct electrical connection between the semiconductor device and the build-up circuitry is advantageous to high I/O and high performance, and the stiffener can provide adequate mechanical support for the build-up circuitry and the semiconductor device.

Abstract: The present invention relates to a method of making a cavity substrate. In accordance with a preferred embodiment, the method includes: preparing a supporting board including a stiffener, a bump/flange sacrificial carrier and an adhesive, wherein the adhesive bonds the stiffener to the sacrificial carrier; forming a coreless build-up circuitry on the supporting board in contact with the bump and the stiffener; and removing the bump and a portion of the flange to form a cavity and expose a conductive via of the coreless build-up circuitry from a closed end of the cavity, wherein the cavity is laterally covered and surrounded by the adhesive. A semiconductor device can be mounted on the cavity substrate and electrically connected to the conductive via. The coreless build-up circuitry provides signal routing for the semiconductor device while the stiffener can provide adequate mechanical support for the coreless build-up circuitry and the semiconductor device.

Abstract: A method of making a semiconductor chip assembly includes providing a bump and a ledge, mounting an adhesive on the ledge including inserting the bump into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the bump with an aperture in the conductive layer, then flowing the adhesive between the bump and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, then mounting a semiconductor device on the bump opposite a cavity in the bump, wherein a heat spreader includes the bump and a base that includes a portion of the ledge adjacent to the bump, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace, a substrate and an adhesive. The heat spreader includes a post and a base. The conductive trace includes a pad, a terminal, a conductive pattern and first and second vias. The substrate includes the conductive pattern and a dielectric layer. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive and an aperture in the substrate, and the base extends laterally from the post. The conductive trace provides signal routing between the pad and the terminal using the conductive pattern and the vias.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace, an adhesive and a support layer. The heat spreader includes a post, a base, an underlayer and a thermal via. The conductive trace includes a pad and a terminal. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, the base extends laterally from the post, the support layer is sandwiched between the base and the underlayer and the thermal via extends from the base through the support layer to the underlayer. The conductive trace provides signal routing between the pad and the terminal.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post, a base and a flange. The conductive trace includes a pad and a terminal. The semiconductor device extends into a cavity in the flange, is electrically connected to the conductive trace and is thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, the flange extends upwardly from the post in the opening and extends laterally above the adhesive, the cavity extends into the opening and the base extends laterally from the post. The conductive trace is located outside the cavity and provides signal routing between the pad and the terminal.

Abstract: A method for auxiliary assembling micro-components though liquid medium. This method includes following steps: providing a substrate, an adhesive layer, at least one micro-component and a liquid medium, wherein the adhesive layer is on the substrate and the micro-component and the liquid medium are on the adhesive layer. The adhesive is used for adhering one side of the micro-component and another side of the micro-components is disposed with is disposed with the liquid medium. Then, the another side of the micro-component which is disposed with the liquid medium touches a target area, and the substrate moves toward the target zone at a speed that is smaller than 90 ?m/s for placing the micro-component on the target zone or moves away from the target zone at a speed greater than 4370 ?m/s for picking up the micro-component from the target zone.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a substrate and an adhesive. The semiconductor device is electrically connected to the substrate and thermally connected to the heat spreader. The heat spreader includes a post and a base. The post extends upwardly through an opening in the adhesive into an aperture in the substrate, and the base extends laterally from the post. The adhesive extends between the post and the substrate and between the base and the substrate. The substrate includes first and second conductive layers and a dielectric layer therebetween and provides horizontal signal routing between a pad and a terminal at the first conductive layer.

Abstract: The present invention relates to a method of making a cavity substrate. The method includes: preparing a supporting board including a stiffener, a bump/flange sacrificial carrier, an adhesive and an electrical pad, wherein the adhesive bonds the stiffener to the sacrificial carrier; forming a coreless build-up circuitry on the supporting board in contact with the bump and the stiffener; and removing the bump to form a cavity and expose the electrical pad from a closed end of the cavity, wherein the cavity is laterally covered and surrounded by the adhesive. A semiconductor device can be mounted on the cavity substrate and electrically connected to the electrical pad. The coreless build-up circuitry provides signal routing for the semiconductor device while the built-in stiffener can provide adequate mechanical support for the coreless build-up circuitry and the semiconductor device.

Abstract: A semiconductor assembly board includes a supporting board, a coreless build-up circuitry and a built-in electronic device. The supporting board includes a bump, a flange and a via hole in the bump. The built-in electronic device extends into the via hole and is electrically connected to the build-up circuitry. The build-up circuitry extends from the flange and the built-in electronic device and provides signal routing for the built-in electronic device. The supporting board provides mechanical support, ground/power plane and heat sink for the coreless build-up circuitry.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and dual adhesives. The heat spreader includes a bump, a base and a ledge. The conductive trace includes a pad and a terminal. The semiconductor device is mounted on the bump in a cavity in the bump, is electrically connected to the conductive trace and is thermally connected to the heat spreader. The bump extends into an opening in the first adhesive and is aligned with and spaced from an opening in the second adhesive. The base and the ledge extend laterally from the bump. The first adhesive is sandwiched between the base and the ledge, the second adhesive is sandwiched between the conductive trace and the ledge and the ledge is sandwiched between the adhesives. The conductive trace is located outside the cavity and provides signal routing between the pad and the terminal.

Abstract: A method of making a semiconductor chip assembly includes providing a bump and a ledge, mounting a first adhesive on the ledge including inserting the bump into an opening in the first adhesive, mounting a conductive layer on the first adhesive including aligning the bump with an aperture in the conductive layer, then flowing the first adhesive between the bump and the conductive layer, solidifying the first adhesive, then providing a heat spreader that includes the bump, a base and the ledge, then mounting a second adhesive on the ledge, mounting a conductive trace that includes a pad and a terminal on the second adhesive, then mounting a semiconductor device on the bump in a cavity in the bump, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: A method of making a stackable semiconductor assembly that includes a semiconductor device, a heat spreader, an adhesive, a terminal, a plated through-hole and build-up circuitry is disclosed. The heat spreader includes a bump, a base and a flange. The bump defines a cavity. The semiconductor device is mounted on the bump at the cavity, electrically connected to the build-up circuitry and thermally connected to the bump. The bump extends from the base into an opening in the adhesive, the base extends vertically from the bump opposite the cavity and the flange extends laterally from the bump at the cavity entrance. The build-up circuitry provides signal routing for the semiconductor device. The plated through-hole provides signal routing between the build-up circuitry and the terminal. The heat spreader provides heat dissipation for the semiconductor device.

Abstract: A method of making a semiconductor chip assembly includes providing a post, a base, an ESD protection layer and a metal layer, wherein the post extends above the base and the ESD protection layer is sandwiched between the base and the metal layer, mounting an adhesive on the base including inserting the post into an opening in the adhesive, mounting a conductive layer on the adhesive including aligning the post with an aperture in the conductive layer, then flowing the adhesive upward between the post and the conductive layer, solidifying the adhesive, then providing a conductive trace that includes a pad, a terminal and a selected portion of the conductive layer, providing a heat spreader that includes the post, the base, the ESD protection layer and an underlayer that includes at least a portion of the metal layer, then mounting a semiconductor device on the post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an insulative material. The heat spreader includes a base and a ceramic block. The conductive trace provides signal routing between a pad and a terminal. The insulative material extends between the base and the terminal. The ceramic block is embedded in the base. The semiconductor device overlaps the ceramic block, is electrically connected to the conductive trace and is thermally connected to the heat spreader.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a bump that includes first, second and third bent corners that shape a cavity. The conductive trace includes a pad and a terminal. The semiconductor device is located within the cavity, is electrically connected to the conductive trace and is thermally connected to the bump. The bump extends into an opening in the adhesive and provides a recessed die paddle and a reflector for the semiconductor device. The conductive trace provides signal routing between the pad and the terminal.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a bump, a base and a flange. The conductive trace includes a pad and a terminal. The semiconductor device extends into a cavity in the bump, is electrically connected to the conductive trace and is thermally connected to the bump. The bump extends from the base into an opening in the adhesive, the base extends vertically from the bump opposite the cavity and the flange extends laterally from the bump at the cavity entrance. The conductive trace is located outside the cavity and provides signal routing between the pad and the terminal.

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post, a base, an ESD protection layer and an underlayer. The conductive trace includes a pad and a terminal. The semiconductor device is electrically connected to the conductive trace, electrically isolated from the underlayer and thermally connected to the heat spreader. The post extends upwardly from the base into an opening in the adhesive, the base extends laterally from the post and the ESD protection layer is sandwiched between the base and the underlayer. The conductive trace provides signal routing between the pad and the terminal.

Abstract: A method of making a semiconductor chip assembly includes providing a metal plate, providing a ceramic block in the metal plate, providing an insulative material in the metal plate, wherein the metal plate includes a base and a terminal, then providing a conductive layer on the base and the ceramic block, providing a conductive trace that includes a pad, the terminal and a selected portion of the conductive layer, then mounting a semiconductor device on the ceramic block, wherein a heat spreader includes the base and the ceramic block, electrically connecting the semiconductor device to the conductive trace and thermally connecting the semiconductor device to the heat spreader.