Patents by Inventor Chia Fang Wu
Chia Fang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11964811Abstract: A liquid storage tank includes a housing, a piston located in the housing, a cover, an elastic element, and an outlet pipe. The cover is attached to the housing and has a support post extending toward the piston. The piston, the housing, and the cover define a tank chamber. The tank chamber is filled with cooling liquid. The elastic element is connected with the tank hosing and the piston. The elastic element is free from contact with the cooling liquid. The outlet pipe communicates with the tank chamber. An extension direction of an opening of the outlet pipe is not parallel to a direction of movement of the elastic element. When the cooling liquid is decreased, the piston compressed the tank chamber such that the elastic element is released. The tank chamber is continuously compressed by pairing the elastic element and the piston.Type: GrantFiled: June 21, 2022Date of Patent: April 23, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yu-Jei Huang, Wei-Fang Wu, Chia-Ying Hsu, Chih-Chieh Lu
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Patent number: 8946874Abstract: Integrated Circuits and methods for reducing thermal neutron soft error rate (SER) of a digital circuit are provided by doping a protection layer on top of the metal layer and in physical contact with the metal layer of the digital circuit, wherein the protection layer is doped with additional thermal neutron absorbing material. The thermal neutron absorbing material can be selected from the group consisting of Gd, Sm, Cd, B, and combinations thereof. The protection layer may comprise a plurality of sub-layers among which a plurality of them containing additional thermal neutron absorbing material.Type: GrantFiled: January 25, 2011Date of Patent: February 3, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Huei Lee, Chou-Jie Tsai, Chia-Fang Wu, Wei-Cheng Chu
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Patent number: 8633109Abstract: Provided is a method of fabricating a semiconductor device. The method includes providing a substrate. The method includes forming a portion of an interconnect structure over the substrate. The portion of the interconnect structure has an opening. The method includes obtaining a boron-containing gas that is free of a boron-10 isotope. The method includes filling the opening with a conductive material to form a contact. The filling of the opening is carried out using the boron-containing gas. Also provided is a semiconductor device. The semiconductor device includes a substrate. The semiconductor device includes an interconnect structure formed over the substrate. The semiconductor device includes a conductive contact formed in the interconnect structure. The conductive contact has a material composition that includes Tungsten and Boron, wherein the Boron is a 11B-enriched Boron.Type: GrantFiled: February 22, 2011Date of Patent: January 21, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Huei Lee, Chou-Jie Tsai, Chia-Fang Wu, Jang Jung Lee, Wei-Cheng Chu, Dong Gui
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Publication number: 20120187549Abstract: Integrated Circuits and methods for reducing thermal neutron soft error rate (SER) of a digital circuit are provided by doping a protection layer on top of the metal layer and in physical contact with the metal layer of the digital circuit, wherein the protection layer is doped with additional thermal neutron absorbing material. The thermal neutron absorbing material can be selected from the group consisting of Gd, Sm, Cd, B, and combinations thereof. The protection layer may comprise a plurality of sub-layers among which a plurality of them containing additional thermal neutron absorbing material.Type: ApplicationFiled: January 25, 2011Publication date: July 26, 2012Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Huei Lee, Chou-Jie Tsai, Chia-Fang Wu, Wei-Cheng Chu
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Publication number: 20120032334Abstract: Provided is a method of fabricating a semiconductor device. The method includes providing a substrate. The method includes forming a portion of an interconnect structure over the substrate. The portion of the interconnect structure has an opening. The method includes obtaining a boron-containing gas that is free of a boron-10 isotope. The method includes filling the opening with a conductive material to form a contact. The filling of the opening is carried out using the boron-containing gas. Also provided is a semiconductor device. The semiconductor device includes a substrate. The semiconductor device includes an interconnect structure formed over the substrate. The semiconductor device includes a conductive contact formed in the interconnect structure. The conductive contact has a material composition that includes Tungsten and Boron, wherein the Boron is a 11B-enriched Boron.Type: ApplicationFiled: February 22, 2011Publication date: February 9, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMAPNY, LTD.Inventors: Yung-Huei Lee, Chou-Jie Tsai, Chia-Fang Wu, Jang Jung Lee, Wei-Cheng Chu, Dong Gui
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Patent number: 7536202Abstract: A wireless network device has a signal detection function and a switching method for the same. A wireless network signal detection module is installed in the wireless network device, and is switched to a wireless network interface card mode or a wireless network signal detection mode after the voltage regulator in the device determines the load voltage. So that the versatile wireless network device is formed to detect the wireless network signal without the PC's help. The steps of switching to the signal detection mode are inclusively detecting the load voltage, switching to the wireless network signal detection mode, scanning the wireless network signal, and finally showing a result in a plurality of manners.Type: GrantFiled: August 3, 2005Date of Patent: May 19, 2009Assignee: Z-Com, Inc.Inventors: Jui-Lin Hsu, Chia-Fang Wu, Tsung-Ming Yang
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Publication number: 20080274773Abstract: A wireless network device is provided for switching into a first functional mode and a second functional mode according to the source of received power. The wireless network device includes a wireless network communication module, a processor, a power module, and a voltage regulator. The wireless network communication module is utilized for transceiving wireless network signal, and the processor is connected to the wireless network communication module. The power module selectively receives a power from one of a battery and a computer. The voltage regulator is connected to the processor, for selectively switching into the first functional mode when receiving the power form the battery, or switching into the second functional mode when receiving the power from the computer.Type: ApplicationFiled: July 21, 2008Publication date: November 6, 2008Applicant: Z-COM, INC.Inventors: Jui Lin Hsu, Chia Fang Wu, Tsung Ming Yang
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Publication number: 20070032272Abstract: A wireless network device has a signal detection function and a switching method for the same. A wireless network signal detection module is installed in the wireless network device, and is switched to a wireless network interface card mode or a wireless network signal detection mode after the voltage regulator in the device determines the load voltage. So that the versatile wireless network device is formed to detect the wireless network signal without the PC's help. The steps of switching to the signal detection mode are inclusively detecting the load voltage, switching to the wireless network signal detection mode, scanning the wireless network signal, and finally showing a result in a plurality of manners.Type: ApplicationFiled: August 3, 2005Publication date: February 8, 2007Inventors: Jui-Lin Hsu, Chia-Fang Wu, Tsung-Ming Yang
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Patent number: 6872507Abstract: A method for forming a patterned microelectronics layer employing electron beam lithography in a sensitive material upon a substrate with optimal correction for proximity effects resulting from electron back scattering into the resist material. There is provided a substrate having formed thereon a layer of resist material sensitive to electron beam exposure. There is then exposed the sensitive layer to a vector scan shaped electron beam to write a primary pattern with dose correction of the beam dose for proximity effects due to electron scattering at each point in the primary pattern. There is then written a secondary pattern which is a negative reversed image of the primary pattern in a secondary exposure employing a vector scan shaped focused electron beam at an exposure dose substantially below the primary beam dose, there being provided a gap between the primary pattern and the secondary pattern.Type: GrantFiled: November 1, 2002Date of Patent: March 29, 2005Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: San-De Tzu, Ching Shiun Chiu, Wei-Zen Chou, Chia Fang Wu
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Publication number: 20040086786Abstract: A method for forming a patterned microelectronics layer employing electron beam lithography in a sensitive material upon a substrate with optimal correction for proximity effects resulting from electron back scattering into the resist material. There is provided a substrate having formed thereon a layer of resist material sensitive to electron beam exposure. There is then exposed the sensitive layer to a vector scan shaped electron beam to write a primary pattern with dose correction of the beam dose for proximity effects due to electron scattering at each point in the primary pattern There is then written a secondary pattern which is a negative reversed image of the primary pattern in a secondary exposure employing a vector scan shaped focused electron beam at an exposure dose substantially below the primary beam dose, there being provided a gap between the primary pattern and the secondary pattern.Type: ApplicationFiled: November 1, 2002Publication date: May 6, 2004Applicant: Taiwan Semiconductor Manufacturing CompanyInventors: San-De Tzu, Ching Shiun Chiu, Wei-Zen Chou, Chia Fang Wu
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Patent number: 6420703Abstract: A method for forming a critical dimension scanning electron microscope calibration standard and standard formed are disclosed. In the method, a plurality of metal lines, i.e. formed of a suitable metal such as W, Pt, Au, Ta or Ti, for use as critical dimension SEM calibration is formed by a focused ion beam technique to produce straight, narrow lines with an edge roughness of less than 30 nm in a 0.5 &mgr;m length. The plurality of metal lines has a line width uniformity of less than 20 nm in a length of 20 &mgr;m.Type: GrantFiled: June 1, 2000Date of Patent: July 16, 2002Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Chia-Fang Wu, Ming-Chun Chou
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Patent number: 6151794Abstract: An apparatus for heat treating an object and specifically a substantially flat object described. The apparatus may be a hot plate post-baking apparatus for heat treating a substantially flat object such as a photomask used in a semiconductor photolithographic process. The apparatus is provided with an upper heat reflector plate that is equipped with upwardly curved edge portions such that the amount of heat reflected by the reflector can be controlled and the center region on the substantially flat object can be temperature compensated for achieving more uniform temperature profile across the entire surface of the mask. By utilizing the heat reflector plate in a post-baking apparatus, the normally observed 5.degree. C. temperature difference across a mask surface is substantially eliminated.Type: GrantFiled: June 2, 1999Date of Patent: November 28, 2000Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventor: Chia-Fang Wu