Patents by Inventor Chia-Feng HSU

Chia-Feng HSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12197926
    Abstract: Aspects of the disclosure provide a method and an apparatus for executing a program, e.g., a neural network (NN) inference. For example, the apparatus can include an executor and a dynamic loading agent. The executor can be coupled to a second memory, and be configured to execute a portion of the NN inference loaded on the second memory from a first memory that stores the NN inference, and to generate a signal based on a progress of the execution of the NN inference. The dynamic loading agent can be coupled to the executor, the first memory and the second memory, and be configured to load a next portion of the NN inference stored in the first memory to the second memory and to manage power supplied to the first memory based on the signal from the executor and an inference executing scheme stored in the second memory.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: January 14, 2025
    Assignee: MEDIATEK INC.
    Inventors: Chih-Hsiang Hsiao, Chia-Feng Hsu
  • Patent number: 12009313
    Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: June 11, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Meng-Jen Wang, Chien-Yuan Tseng, Hung Chen Kuo, Ying-Hao Wei, Chia-Feng Hsu, Yuan-Long Chiao
  • Patent number: 11726544
    Abstract: Aspects of the disclosure provide an apparatus for executing a program that involves a plurality of operators. For example, the apparatus can include an executor and an analyzer. The executor can be configured to execute the program with at least a first one of the operators loaded on a second memory from a first memory that stores the operators and to generate a signal based on a progress of the execution of the program with the first operator. The analyzer can be coupled to the executor, the first memory and the second memory, and configured to load at least a second one of the operators of the program next to the first operator stored in the first memory to the second memory before the executor finishes execution of the program with the first operator based on the signal from the executor and an executing scheme stored in the second memory.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: August 15, 2023
    Assignee: MEDIATEK INC.
    Inventors: Chih-Hsiang Hsiao, Chia-Feng Hsu
  • Publication number: 20230104397
    Abstract: A selective EMI shielding structure for a semiconductor package and a method of fabrication thereof is disclosed. The semiconductor package, comprising: a substrate having a first face; at least one first electronic component mounted adjacent to a first region of the first face; a least one second electronic component mounted adjacent to a second region of the first face; and an encapsulant disposed over the first and the second electronic components, wherein the encapsulant covers directly over the first electronic component, and wherein the encapsulant covers the second electronic component through a layer of conductive material.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Jen WANG, Chien-Yuan TSENG, Hung Chen KUO, Ying-Hao WEI, Chia-Feng HSU, Yuan-Long CHIAO
  • Publication number: 20220229487
    Abstract: Aspects of the disclosure provide an apparatus for executing a program that involves a plurality of operators. For example, the apparatus can include an executor and an analyzer. The executor can be configured to execute the program with at least a first one of the operators loaded on a second memory from a first memory that stores the operators and to generate a signal based on a progress of the execution of the program with the first operator. The analyzer can be coupled to the executor, the first memory and the second memory, and configured to load at least a second one of the operators of the program next to the first operator stored in the first memory to the second memory before the executor finishes execution of the program with the first operator based on the signal from the executor and an executing scheme stored in the second memory.
    Type: Application
    Filed: April 6, 2022
    Publication date: July 21, 2022
    Applicant: MEDIATEK INC.
    Inventors: Chih-Hsiang HSIAO, Chia-Feng HSU
  • Publication number: 20220004399
    Abstract: Aspects of the disclosure provide a method and an apparatus for executing a program, e.g., a neural network (NN) inference. For example, the apparatus can include an executor and a dynamic loading agent. The executor can be coupled to a second memory, and be configured to execute a portion of the NN inference loaded on the second memory from a first memory that stores the NN inference, and to generate a signal based on a progress of the execution of the NN inference. The dynamic loading agent can be coupled to the executor, the first memory and the second memory, and be configured to load a next portion of the NN inference stored in the first memory to the second memory and to manage power supplied to the first memory based on the signal from the executor and an inference executing scheme stored in the second memory.
    Type: Application
    Filed: November 13, 2020
    Publication date: January 6, 2022
    Applicant: MEDIATEK INC.
    Inventors: Chih-Hsiang HSIAO, Chia-Feng HSU