Abstract: A method for accessing a flash memory module includes: determining a type of data to be written into the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to the type of data, wherein the plurality of sets of encoding/decoding settings correspond to different data lengths, respectively; utilizing the specific encoding/decoding setting to encode the data to generate encoded data; and writing the encoded data into a block of the flash memory module.

Abstract: A method for accessing a flash memory module includes: selecting a block in the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to an erase count of the block, wherein the plurality of sets of encoding/decoding settings include different error correction code (ECC) lengths, respectively; utilizing the specific encoding/decoding setting to encode a data to generate an encoded data; and writing the encoded data into the block.

Abstract: A mapping table updating method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: calculating a plurality of updated data counts of a plurality of updated logical units in at least one active physical erasing unit respectively according to a physical-logical mapping table; selecting a first updated logical unit from a plurality of updated logical units according to the plurality of updated data counts, and the number of the first updated logical unit is less than the number of the plurality of updated logical units; loading a first logical-physical mapping table corresponding to the first updated logical unit; and updating mapping information in the first logical-physical mapping table according to mapping information of the first updated logical unit in the physical-logical mapping table.

Abstract: A mapping table updating method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: calculating a plurality of updated data counts of a plurality of updated logical units in at least one active physical erasing unit respectively according to a physical-logical mapping table; selecting a first updated logical unit from a plurality of updated logical units according to the plurality of updated data counts, and the number of the first updated logical unit is less than the number of the plurality of updated logical units; loading a first logical-physical mapping table corresponding to the first updated logical unit; and updating mapping information in the first logical-physical mapping table according to mapping information of the first updated logical unit in the physical-logical mapping table.

Abstract: A data writing method, a memory storage device and a memory control circuit unit are provided. The data writing method includes: writing first data belonging to a first logical sub-unit of a first logical unit and second data belonging to a second logical sub-unit of the first logical unit to a first physical erasing unit and a second physical erasing unit respectively; recording use information corresponding to each logical unit; and executing a data arrangement operation corresponding to the first logical unit based on the use information of the first logical unit to copy the first data and the second data from the first physical erasing unit and the second physical erasing unit to a third physical erasing unit, wherein a logical address range of the second logical sub-unit follows a logical address range of the first logical sub-unit.

Abstract: A data storage device including a flash memory and a controller. The controller performs a first read operation on the pages of a first block of a first block group, and performs a maintenance process to determine whether the first group read count of the first block group is greater than a read threshold when the first read operation is finished. The controller scans the blocks of the first block group to obtain a plurality of first error bit numbers when the first group read count is greater than the read threshold, and updates the block corresponding to the first error bit number that is greater than an error-bit threshold.

Abstract: A data writing method, a memory storage device and a memory control circuit unit are provided. The data writing method includes: writing first data belonging to a first logical sub-unit of a first logical unit and second data belonging to a second logical sub-unit of the first logical unit to a first physical erasing unit and a second physical erasing unit respectively; recording use information corresponding to each logical unit; and executing a data arrangement operation corresponding to the first logical unit based on the use information of the first logical unit to copy the first data and the second data from the first physical erasing unit and the second physical erasing unit to a third physical erasing unit, wherein a logical address range of the second logical sub-unit follows a logical address range of the first logical sub-unit.

Abstract: A data storage device including a flash memory and a controller. The controller performs a first read operation on the pages of a first block of a first block group, and performs a maintenance process to determine whether the first group read count of the first block group is greater than a read threshold when the first read operation is finished. The controller scans the blocks of the first block group to obtain a plurality of first error bit numbers when the first group read count is greater than the read threshold, and updates the block corresponding to the first error bit number that is greater than an error-bit threshold.

Abstract: A data storage device including a flash memory and a controller. The controller performs a first read operation on the pages of a first block of a first block group, and performs a maintenance process to determine whether the first group read count of the first block group is greater than a read threshold when the first read operation is finished. The controller scans the blocks of the first block group to obtain a plurality of first error bit numbers when the first group read count is greater than the read threshold, and updates the block corresponding to the first error bit number that is greater than an error-bit threshold.

Abstract: A data storage device including a flash memory and a controller. The controller performs a first read operation on the pages of a first block of a first block group, and performs a maintenance process to determine whether the first group read count of the first block group is greater than a read threshold when the first read operation is finished. The controller scans the blocks of the first block group to obtain a plurality of first error bit numbers when the first group read count is greater than the read threshold, and updates the block corresponding to the first error bit number that is greater than an error-bit threshold.

Abstract: The disclosure is a data modulation/encryption method used in a holographic storage system. The data modulation method includes steps of: receiving an original data sequence; arraying the original data sequence to a first matrix with n×n dimensions; multiplying the first matrix by a sparse matrix to generate a second matrix with n×n dimensions; executing a modulating and mapping procedure for generating a third matrix with (n+1)×n or n×(n+1) dimensions, wherein the third matrix is composed of a modulation part and an extra part; and, storing the third matrix; wherein the sparse matrix is a binary matrix, a total number of elements in each row of the sparse matrix is odd, all rows of the sparse matrix have a same even number of bit 1, all columns of the sparse matrix have a same even number of bit 1, and the sparse matrix has an inverse matrix.

Abstract: A data processing method for a holographic data storage system includes in a writing operation, receiving a plurality of digital data groups; modulating the digital data groups to a plurality of corresponding digital matrixes, wherein each of the digital matrix comprises a digital data group and a plurality of digital redundancies; arraying the digital matrixes on a data plane to form an image information, wherein the image information has more opaque pixels than transparent pixels; and storing the image information in a storage medium; and in a reading operation, receiving the image information; transforming the image information into a plurality of analog matrixes, wherein each of the analog matrixes comprises an analog data portion and an analog redundancy portion; demodulating the analog matrixes to a plurality of corresponding analog data groups; and transforming the analog data groups into a plurality of digital data groups by using a soft decision apparatus.

Abstract: A data processing method for a holographic data storage system includes in a writing operation, receiving a plurality of digital data groups; modulating the digital data groups to a plurality of corresponding digital matrixes, wherein each of the digital matrix comprises a digital data group and a plurality of digital redundancies; arraying the digital matrixes on a data plane to form an image information, wherein the image information has more opaque pixels than transparent pixels; and storing the image information in a storage medium; and in a reading operation, receiving the image information; transforming the image information into a plurality of analog matrixes, wherein each of the analog matrixes comprises an analog data portion and an analog redundancy portion; demodulating the analog matrixes to a plurality of corresponding analog data groups; and transforming the analog data groups into a plurality of digital data groups by using a soft decision apparatus.

Abstract: The disclosure is a data modulation/encryption method used in a holographic storage system. The data modulation method includes steps of: receiving an original data sequence; arraying the original data sequence to a first matrix with n×n dimensions; multiplying the first matrix by a sparse matrix to generate a second matrix with n×n dimensions; executing a modulating and mapping procedure for generating a third matrix with (n+1)×n or n×(n+1) dimensions, wherein the third matrix is composed of a modulation part and an extra part; and, storing the third matrix; wherein the sparse matrix is a binary matrix, a total number of elements in each row of the sparse matrix is odd, all rows of the sparse matrix have a same even number of bit 1, all columns of the sparse matrix have a same even number of bit 1, and the sparse matrix has an inverse matrix.