Patents by Inventor Chia-Hao HUNG

Chia-Hao HUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240379444
    Abstract: A method includes providing a substrate, a dummy fin, and a stack of semiconductor channel layers; forming an interfacial layer wrapping around each of the semiconductor channel layers; depositing a high-k dielectric layer, wherein a first portion of the high-k dielectric layer over the interfacial layer is spaced away from a second portion of the high-k dielectric layer on sidewalls of the dummy fin by a first distance; depositing a first dielectric layer over the dummy fin and over the semiconductor channel layers, wherein a merge-critical-dimension of the first dielectric layer is greater than the first distance thereby causing the first dielectric layer to be deposited in a space between the dummy fin and a topmost layer of the stack of semiconductor channel layers, thereby providing air gaps between adjacent layers of the stack of semiconductor channel layers and between the dummy fin and the stack of semiconductor channel layers.
    Type: Application
    Filed: July 14, 2024
    Publication date: November 14, 2024
    Inventors: Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Kian-Long Lim, Chih-Wei Lee, Chien-Yuan Chen, Jo-Chun Hung, Yung-Hsiang Chan, Yu-Kuan Lin, Lien-Jung Hung
  • Publication number: 20240371437
    Abstract: A memory device is provided. The memory device includes a memory cell array having a plurality of memory cells arranged in a matrix of a plurality of rows and a plurality of columns. Each of the plurality of columns include a first plurality of memory cells connected to a first bit line and a second bit line. A pre-charge circuit is connected to the memory cell array. The pre-charge circuit pre-charges each of the first bit line and the second bit line from a first end. A pre-charge assist circuit is connected to the memory cell array. The pre-charge assist circuit pre-charges each of the first bit line and the second bit line from a second end, the second end being opposite the first end.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hao PAO, Kian-Long LIM, Chih-Chuan YANG, Jui-Wen CHANG, Chao-Yuan CHANG, Feng-Ming CHANG, Lien-Jung HUNG, Ping-Wei WANG
  • Patent number: 12080604
    Abstract: A method includes providing a substrate, a dummy fin, and a stack of semiconductor channel layers; forming an interfacial layer wrapping around each of the semiconductor channel layers; depositing a high-k dielectric layer, wherein a first portion of the high-k dielectric layer over the interfacial layer is spaced away from a second portion of the high-k dielectric layer on sidewalls of the dummy fin by a first distance; depositing a first dielectric layer over the dummy fin and over the semiconductor channel layers, wherein a merge-critical-dimension of the first dielectric layer is greater than the first distance thereby causing the first dielectric layer to be deposited in a space between the dummy fin and a topmost layer of the stack of semiconductor channel layers, thereby providing air gaps between adjacent layers of the stack of semiconductor channel layers and between the dummy fin and the stack of semiconductor channel layers.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Kian-Long Lim, Chih-Wei Lee, Chien-Yuan Chen, Jo-Chun Hung, Yung-Hsiang Chan, Yu-Kuan Lin, Lien-Jung Hung
  • Patent number: 12080342
    Abstract: A memory device is provided. The memory device includes a memory cell array having a plurality of memory cells arranged in a matrix of a plurality of rows and a plurality of columns. Each of the plurality of columns include a first plurality of memory cells connected to a first bit line and a second bit line. A pre-charge circuit is connected to the memory cell array. The pre-charge circuit pre-charges each of the first bit line and the second bit line from a first end. A pre-charge assist circuit is connected to the memory cell array. The pre-charge assist circuit pre-charges each of the first bit line and the second bit line from a second end, the second end being opposite the first end.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: September 3, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hao Pao, Kian-Long Lim, Chih-Chuan Yang, Jui-Wen Chang, Chao-Yuan Chang, Feng-Ming Chang, Lien-Jung Hung, Ping-Wei Wang
  • Publication number: 20240292592
    Abstract: A semiconductor device according to the present disclosure includes a gate extension structure, a first source/drain feature and a second source/drain feature, a vertical stack of channel members extending between the first source/drain feature and the second source/drain feature along a direction, and a gate structure wrapping around each of the vertical stack of channel members. The gate extension structure is in direct contact with the first source/drain feature.
    Type: Application
    Filed: May 6, 2024
    Publication date: August 29, 2024
    Inventors: Chih-Chuan Yang, Chia-Hao Pao, Yu-Kuan Lin, Lien-Jung Hung, Ping-Wei Wang, Shih-Hao Lin
  • Patent number: 12054382
    Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: August 6, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsi-Cheng Hsu, Kuo-Hao Lee, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Lavanya Sanagavarapu, Chia-Yu Lin, Chia-Chun Hung, Jia-Syuan Li, Yu-Pei Chiang
  • Patent number: 11829463
    Abstract: Provided is an electronic device, including a housing, a fixing hole, a platform and a sensor. The fixing hole is located at the housing and configured to detachably fix an identification element. The platform extends outward from the lower edge of the fixing hole. The sensor is disposed on the platform and configured to communicate with the identification element.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: November 28, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chia-Hao Hung, Ming-Chih Huang, Tong-Shen Hsiung, Meng-Chu Huang, Fu-Yu Cai, Chieh Mii, Ya-Yun Huang, Minseong Kim, Shang-Chih Liang
  • Patent number: 11132023
    Abstract: A casing of an electronic device including successive pattern structures is provided, including a first body, a second body, a first light emitting pattern, and a second light emitting pattern. The first body includes an outer surface and an inner surface, and the outer surface includes a first side edge. The second body includes an upper surface and a pivoting structure. The upper surface includes a covered area and an exposed area. The first body is pivotally connected to the second body through the pivoting structure, and the pivoting structure is located between the covered area and the exposed area. The first light emitting pattern is located on the outer surface and includes a first end extending to the first side edge. A second light emitting pattern, located on the exposed area, and including a second end. When the inner surface covers the covered area, the first end is aligned with the second end.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: September 28, 2021
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Meng-Chu Huang, Chieh Mii, Fu-Yu Cai, Chia-Hao Hung, Shang-Chih Liang, Ming-Chih Huang, Tong-Shen Hsiung
  • Publication number: 20210222857
    Abstract: A light-transmitting plastic casing and a manufacturing method thereof are provided. A manufacturing method of a light-transmitting plastic casing include the steps: providing a mixed material, the mixed material includes a resinous material, a flame retardant material, a transparent fiberglass material, and an elastomer material; performing a granulating step to the mixed material to form granules; performing a heating step to the granules; and performing a molding step to heated granules to form a light-transmitting plastic casing.
    Type: Application
    Filed: January 19, 2021
    Publication date: July 22, 2021
    Inventors: Li-Chen CHAN, Tong-Shen HSIUNG, Ming-Chih HUANG, Meng-Chu HUANG, Shang-Chih LIANG, Fu-Yu CAI, Chia-Hao HUNG
  • Patent number: 10921861
    Abstract: An electronic device including a luminous strip is provided, including a housing, a first light guiding strip, a second light guiding strip, a light-transmissive structure, a first light-emitting element, a second light-emitting element and a third light-emitting element. The housing includes a first side wall and a second side wall, where a corner area exists between the first side wall and the second side wall. The first light guiding strip is disposed on the first side wall. The second light guiding strip is disposed on the second side wall. The light-transmissive structure is disposed in the corner area, and connected to the first light guiding strip and the second light guiding strip. The first light-emitting element is disposed at a first end of the first light guiding strip. The second light-emitting element is disposed at a second end of the second light guiding strip.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: February 16, 2021
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chieh Mii, Ming-Chih Huang, Tong-Shen Hsiung, Meng-Chu Huang, Fu-Yu Cai, Shang-Chih Liang, Chia-Hao Hung, Li-Wei Yu, Chi Cheng Liao, Hsin-I Lu, Cheng-Yu Lin
  • Publication number: 20200333842
    Abstract: A casing of an electronic device including successive pattern structures is provided, including a first body, a second body, a first light emitting pattern, and a second light emitting pattern. The first body includes an outer surface and an inner surface, and the outer surface includes a first side edge. The second body includes an upper surface and a pivoting structure. The upper surface includes a covered area and an exposed area. The first body is pivotally connected to the second body through the pivoting structure, and the pivoting structure is located between the covered area and the exposed area. The first light emitting pattern is located on the outer surface and includes a first end extending to the first side edge. A second light emitting pattern, located on the exposed area, and including a second end. When the inner surface covers the covered area, the first end is aligned with the second end.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 22, 2020
    Inventors: Meng-Chu HUANG, Chieh MII, Fu-Yu CAI, Chia-Hao HUNG, Shang-Chih LIANG, Ming-Chih HUANG, Tong-Shen HSIUNG
  • Publication number: 20200334350
    Abstract: Provided is an electronic device, including a housing, a fixing hole, a platform and a sensor. The fixing hole is located at the housing and configured to detachably fix an identification element. The platform extends outward from the lower edge of the fixing hole. The sensor is disposed on the platform and configured to communicate with the identification element.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 22, 2020
    Inventors: Chia-Hao HUNG, Ming-Chih HUANG, Tong-Shen HSIUNG, Meng-Chu HUANG, Fu-Yu CAI, Chieh MII, Ya-Yun HUANG, Minseong KIM, Shang-Chih LIANG
  • Publication number: 20200333850
    Abstract: An electronic device including a luminous strip is provided, including a housing, a first light guiding strip, a second light guiding strip, a light-transmissive structure, a first light-emitting element, a second light-emitting element and a third light-emitting element. The housing includes a first side wall and a second side wall, where a corner area exists between the first side wall and the second side wall. The first light guiding strip is disposed on the first side wall. The second light guiding strip is disposed on the second side wall. The light-transmissive structure is disposed in the corner area, and connected to the first light guiding strip and the second light guiding strip. The first light-emitting element is disposed at a first end of the first light guiding strip. The second light-emitting element is disposed at a second end of the second light guiding strip.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 22, 2020
    Inventors: Chieh MII, Ming-Chih HUANG, Tong-Shen HSIUNG, Meng-Chu HUANG, Fu-Yu CAI, Shang-Chih LIANG, Chia-Hao HUNG, Li-Wei YU, Chi Cheng LIAO, Hsin-I LU, Cheng-Yu LIN
  • Patent number: D1026897
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: May 14, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Ming-Chen Chen, Tong-Shen Hsiung, Chia-Hao Hung