Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A socket of a testing tool is configured to provide testing signals. A device-under-test (DUT) board is configured to provide electrical routing. An integrated circuit (IC) die is disposed between the socket and the DUT board. The testing signals are electrically routed to the IC die through the DUT board. The IC die includes a substrate in which plurality of transistors is formed. A first structure contains a plurality of first metallization components. A second structure contains a plurality of second metallization components. The first structure is disposed over a first side of the substrate. The second structure is disposed over a second side of the substrate opposite the first side. A trench extends through the DUT board and extends partially into the IC die from the second side. A signal detection tool is configured to detect electrical or optical signals generated by the IC die.

Abstract: A user equipment (UE) and a method for beam indication in a multi-transmission and reception point (MTRP) are provided. The method includes: receiving, from a base station (BS), first downlink control information (DCI) including a first transmission configuration indication (TCI) field indicating a first TCI state, the first DCI being associated with a first value; receiving, from the BS, second DCI including a second TCI field indicating a second TCI state, the second DCI being associated with a second value; performing, based on the first TCI state, a first uplink (UL) transmission; and performing, based on the second TCI state, a second UL transmission. The first UL transmission is scheduled by third DCI associated with the first value, and the second UL transmission is scheduled by fourth DCI associated with the second value.

Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.

Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.

Abstract: An integrated circuit (IC) chip assembly includes an integrated circuit (IC) die that includes a first substrate in which plurality of transistors is formed, a first structure that contains a plurality of first metallization components, and a second structure that contains a plurality of second metallization components. The first structure is disposed over a first side of the first substrate. The second structure is disposed over a second side of the first substrate opposite the first side. The chip assembly includes a second substrate bonded to the IC die through the second side. The chip assembly includes a trench that extends through the second substrate and through the second structure of the IC die. Sidewalls of the trench are defined at least in part by one or more protective layers.

Abstract: A light emitting panel includes a circuit substrate, a plurality of first light emitting components, a plurality of second light emitting components, and a plurality of third light emitting components. The circuit substrate has a plurality of main pixel areas. Each main pixel area is divided into a first subpixel area, a second subpixel area, and a third subpixel area. The first light emitting components, the second light emitting components and the third light emitting components are located in the first subpixel areas, the second subpixel areas and the third subpixel areas respectively. The first light emitting components in two adjacent first subpixel areas are electrically connected in series. The size of each of the first light emitting components is larger than the size of each of the second light emitting components and the third light emitting components.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A socket of a testing tool is configured to provide testing signals. A device-under-test (DUT) board is configured to provide electrical routing. An integrated circuit (IC) die is disposed between the socket and the DUT board. The testing signals are electrically routed to the IC die through the DUT board. The IC die includes a substrate in which plurality of transistors is formed. A first structure contains a plurality of first metallization components. A second structure contains a plurality of second metallization components. The first structure is disposed over a first side of the substrate. The second structure is disposed over a second side of the substrate opposite the first side. A trench extends through the DUT board and extends partially into the IC die from the second side. A signal detection tool is configured to detect electrical or optical signals generated by the IC die.

Abstract: A semiconductor substrate includes a plurality of transistors. A first structure is disposed over a first side of the semiconductor substrate. The first structure contains a plurality of first metallization components. A carrier substrate is disposed over the first structure. The first structure is located between the carrier substrate and the semiconductor substrate. One or more openings extend through the carrier substrate and expose one or more regions of the first structure to the first side. A second structure is disposed over a second side of the semiconductor substrate opposite the first side. The second structure contains a plurality of second metallization components.

Abstract: An integrated circuit (IC) chip assembly includes an integrated circuit (IC) die that includes a first substrate in which plurality of transistors is formed, a first structure that contains a plurality of first metallization components, and a second structure that contains a plurality of second metallization components. The first structure is disposed over a first side of the first substrate. The second structure is disposed over a second side of the first substrate opposite the first side. The chip assembly includes a second substrate bonded to the IC die through the second side. The chip assembly includes a trench that extends through the second substrate and through the second structure of the IC die. Sidewalls of the trench are defined at least in part by one or more protective layers.

Abstract: A method includes: providing a first semiconductor device including a backside interconnection structure, the first semiconductor device being formed by a semiconductor process; and generating a physical failure analysis model by an inspection process. The inspection process includes: directing an electron beam toward the frontside of the first semiconductor device; and applying an electrical signal to an electrical contact of the first semiconductor device through an electrical path that goes through a shunt board attached to a switchable interface trace bank, the electrical contact being associated with a position of the electron beam. The method further includes: generating a parameter of a revised semiconductor process according to the physical failure analysis model and the semiconductor process; and forming a second semiconductor device by the revised semiconductor process using the parameter.

Abstract: The present disclosure describes a structure that includes a substrate with first and second sides, a device layer disposed on the first side of the substrate, having a fault detection area on a back-side surface of the device layer configured to emit a signal that is indicative of a presence or an absence of a defect in the device layer, a first interconnect structure disposed on a front-side of the device layer, and a second interconnect structure disposed on the second side of the substrate, having a metal-free region aligned with the fault detection area and a first metal layer having first and second conductive lines disposed substantially parallel to each other. First and second sidewalls of the first and second conductive lines, respectively, facing each other are substantially aligned with first and second sides of the fault detection area.

Abstract: A smart electric meter is provided. The smart electric meter includes a body, an antenna holder, an antenna structure and a supporting member. The antenna holder is disposed on the body, wherein the antenna holder is annular. The antenna structure is disposed on the antenna holder, wherein the antenna structure is moveable along a circumferential direction of the antenna holder. The supporting member is connected to the antenna structure, wherein the supporting member is moveably disposed on the antenna holder, and the supporting member moves the antenna structure along the circumferential direction of the antenna holder.

Abstract: A multiband antenna for receiving or transmitting wireless signals of a plurality of frequency bands includes a grounding sheet, formed with a hole at a first side, for providing grounding, a first micro-strip line, substantially parallel to the first side of the grounding sheet, a connecting unit, connecting to the first side of the grounding sheet and the first micro-strip line, for forming a resonant cavity with the first side of the grounding sheet and the first micro-strip line, a second micro-strip line, formed in the resonant cavity and substantially parallel to the first micro-strip line, a third micro-strip line, extending from the hole of the grounding sheet to the second micro-strip line, and a feed-in terminal, formed on the third micro-strip line within the hole, for transmitting the wireless signals.

Abstract: A smart meter capable of performing wireless transmission is used to show some power information, in which the smart meter includes an inner cylindrical case, a ring layer, an inner-layer antenna, and an outer-layer antenna. The interior of the inner cylindrical case is hollow. The ring layer surrounds the inner cylindrical case. The inner-layer antenna is attached to the ring layer and slides on the ring layer. The outer-layer antenna is also attached to the ring layer and overlaps as well as contacts with the inner-layer antenna. The inner-layer antenna and the outer-layer antenna are driven to adjust a total length of them in order to receive signals of different frequency bands.

Abstract: A three-dimensional antenna includes an L-shaped grounding element and an L-shaped radiating element. The grounding and radiating elements are arranged in a U shape. The grounding element includes a first grounding segment, a second grounding segment extending from the first grounding segment, and a short-circuit point disposed at the second grounding segment. The radiating element includes a first radiating segment opposite to the first grounding segment, a second radiating segment extending from the first radiating segment and adjacent to the second grounding segment, a feeding point disposed at the second radiating segment, and two radiator arms being able to generate respective resonant frequencies.

Abstract: An unsymmetrical dipole antenna includes a grounding element, a radiating element, and a feed-in wire. The grounding element includes a first short side metal plane and a first long side metal plane. The radiating element includes a second short side metal plane and a second long side metal plane. The feed-in wire includes a metal wire, coupled to the second short side metal plane for transmitting a feed-in signal; an insulation layer, covering the metal wire; a metal weave, covering the insulation layer, having one terminal coupled to the first short side metal plane of the grounding element, and another terminal coupled to a system ground of the wireless communication device; and a protective layer, covering the metal weave. A size of the grounding element and a size of the radiating element are irrelative.

Abstract: A smart meter capable of performing wireless transmission is used to show some power information, in which the smart meter includes an inner cylindrical case, a ring layer, an inner-layer antenna, and an outer-layer antenna. The interior of the inner cylindrical case is hollow. The ring layer surrounds the inner cylindrical case. The inner-layer antenna is attached to the ring layer and slides on the ring layer. The outer-layer antenna is also attached to the ring layer and overlaps as well as contacts with the inner-layer antenna. The inner-layer antenna and the outer-layer antenna are driven to adjust a total length of them in order to receive signals of different frequency bands.

Abstract: A multiband antenna for receiving or transmitting wireless signals of a plurality of frequency bands includes a grounding sheet, formed with a hole at a first side, for providing grounding, a first micro-strip line, substantially parallel to the first side of the grounding sheet, a connecting unit, connecting to the first side of the grounding sheet and the first micro-strip line, for forming a resonant cavity with the first side of the grounding sheet and the first micro-strip line, a second micro-strip line, formed in the resonant cavity and substantially parallel to the first micro-strip line, a third micro-strip line, extending from the hole of the grounding sheet to the second micro-strip line, and a feed-in terminal, formed on the third micro-strip line within the hole, for transmitting the wireless signals.