Patents by Inventor Chia-Hsiun Yu

Chia-Hsiun Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8383508
    Abstract: The present invention provides a fabrication method of an opening. The method includes providing a substrate having a conductive region therein. Thereafter, a dielectric layer is formed over the substrate and then a stacked layer is formed on the dielectric layer. The stacked layer includes a patterned metal hard mask layer, a patterned silicon oxynitride layer and a patterned silicon oxide layer on the dielectric layer in sequence. Afterward, a first portion of the dielectric layer is removed using the stacked layer as a first mask to form a first opening that exposes a surface of the conductive region.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: February 26, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Hsing Liu, Chia-Hsiun Yu
  • Publication number: 20090227113
    Abstract: The present invention provides a fabrication method of an opening. The method includes providing a substrate having a conductive region therein. Thereafter, a dielectric layer is formed over the substrate and then a stacked layer is formed on the dielectric layer. The stacked layer includes a patterned metal hard mask layer, a patterned silicon oxynitride layer and a patterned silicon oxide layer on the dielectric layer in sequence. Afterward, a first portion of the dielectric layer is removed using the stacked layer as a first mask to form a first opening that exposes a surface of the conductive region.
    Type: Application
    Filed: April 20, 2009
    Publication date: September 10, 2009
    Applicant: United Microelectronics Corp.
    Inventors: Ming-Hsing Liu, Chia-Hsiun Yu
  • Patent number: 7550377
    Abstract: A method for fabricating a single-damascene opening is described. The method includes providing a substrate having a conductive line formed therein. A barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer, a bottom antireflection layer and a patterned photoresist layer are sequentially formed on the substrate. The bottom antireflection layer, the silicon oxynitride layer and the metal hard mask layer that are not covered by the patterned photoresist layer are removed in a single process step, until a part of the surface of the dielectric layer is exposed. Thereafter, the patterned photoresist layer and the bottom antireflection layer are removed. Further using the silicon oxynitride layer and the metal hard mask layer as a mask, a portion of the dielectric layer and a portion of the barrier layer are removed to form a damascene opening that exposes the surface of the conductive line.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: June 23, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Hsing Liu, Chia-Hsiun Yu
  • Publication number: 20080277789
    Abstract: A method for fabricating a single-damascene opening is described. The method includes providing a substrate having a conductive line formed therein. A barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer, a bottom antireflection layer and a patterned photoresist layer are sequentially formed on the substrate. The bottom antireflection layer, the silicon oxynitride layer and the metal hard mask layer that are not covered by the patterned photoresist layer are removed in a single process step, until a part of the surface of the dielectric layer is exposed. Thereafter, the patterned photoresist layer and the bottom antireflection layer are removed. Further using the silicon oxynitride layer and the metal hard mask layer as a mask, a portion of the dielectric layer and a portion of the barrier layer are removed to form a damascene opening that exposes the surface of the conductive line.
    Type: Application
    Filed: June 3, 2008
    Publication date: November 13, 2008
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hsing Liu, Chia-Hsiun Yu
  • Publication number: 20070298604
    Abstract: A method for fabricating a single-damascene opening is described. The method includes providing a substrate having a conductive line formed therein. A barrier layer, a dielectric layer, a metal hard mask layer, a silicon oxynitride layer, a bottom antireflection layer and a patterned photoresist layer are sequentially formed on the substrate. The bottom antireflection layer, the silicon oxynitride layer and the metal hard mask layer that are not covered by the patterned photoresist layer are removed in a single process step, until a part of the surface of the dielectric layer is exposed. Thereafter, the patterned photoresist layer and the bottom antireflection layer are removed. Further using the silicon oxynitride layer and the metal hard mask layer as a mask, a portion of the dielectric layer and a portion of the barrier layer are removed to form a damascene opening that exposes the surface of the conductive line.
    Type: Application
    Filed: June 22, 2006
    Publication date: December 27, 2007
    Inventors: Ming-Hsing Liu, Chia-Hsiun Yu