Patents by Inventor Chia-Hsuan Lin
Chia-Hsuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240121685Abstract: A method of reducing gray energy consumption and achieving optimal gray energy saving for carbon neutralization is proposed. In a cellular network, each cell or BS (group of cells) has renewable (green) and non-renewable (gray, on-grid power) energy sources. The renewable (green) energy is highly variable and unpredictable, while non-renewable (gray, on-grid power) is stable but is not renewable and thus has more carbon impact. Each cell or BS (group of cells) services is associated UEs when it is on. In one novel aspect, a cell or BS (group of cells) that consumes more non-renewable energy can give some or all of its served UEs to another cell or BS (group of cells) that consumes less non-renewable energy.Type: ApplicationFiled: September 21, 2023Publication date: April 11, 2024Inventors: Chien-Sheng Yang, I-Kang Fu, YUAN-CHIEH LIN, Chia-Lin Lai, Yu-Hsin Lin, Yun-Hsuan Chang
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Patent number: 11948895Abstract: A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. Holes are formed on a surface of the substrate, wherein the holes are located within a projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material surrounds the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate are exposed by the molding material.Type: GrantFiled: July 4, 2022Date of Patent: April 2, 2024Assignee: MEDIATEK INC.Inventors: Tzu-Hung Lin, Chia-Cheng Chang, I-Hsuan Peng, Nai-Wei Liu
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Patent number: 11947886Abstract: A development system and a method of an offline software-in-the-loop simulation are disclosed. A common firmware architecture generates a chip control program. The common firmware architecture has an application layer and a hardware abstraction layer. The application layer has a configuration header file and a product program. A processing program required by a peripheral module is added to the hardware abstraction layer during compiling. The chip control program is provided to a controller chip or a circuit simulation software to be executed to control the product-related circuit through controlling the peripheral module.Type: GrantFiled: June 28, 2022Date of Patent: April 2, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yu-Jen Lin, Chang-Chung Lin, Chia-Wei Chu, Terng-Wei Tsai, Feng-Hsuan Tung
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Publication number: 20240088307Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
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Patent number: 11929318Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.Type: GrantFiled: May 10, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
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Patent number: 11453743Abstract: A thermoset epoxy resin, its preparing composition and making process are disclosed. In particular, the thermoset epoxy resin is glycidyl ether of diphenolic bis-carbamate and formed by curing a one component epoxy composition and has a general structure as shown in formula (1).Type: GrantFiled: June 5, 2020Date of Patent: September 27, 2022Assignee: CHANDA CHEMICAL CORP.Inventors: Chien-Hsin Wu, Ying-Chi Huang, Kuan-Ting Chen, Chia-Hsuan Lin, Sheng-Hong A. Dai, Ru-Jong Jeng
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Publication number: 20210380756Abstract: A thermoset epoxy resin, its preparing composition and making process are disclosed. In particular, the thermoset epoxy resin is glycidyl ether of diphenolic bis-carbamate and formed by curing a one component epoxy composition and has a general structure as shown in formula (1).Type: ApplicationFiled: June 5, 2020Publication date: December 9, 2021Inventors: Chien-Hsin Wu, Ying-Chi Huang, Kuan-Ting Chen, Chia-Hsuan Lin, Sheng-hong A. Dai, Ru-Jong Jeng
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Publication number: 20210183513Abstract: The present disclosure provides a method for disease control of plants, comprising predicting the probability of a disease occurrence and suggesting a suitable and effective control measure for the identified pathogen and/or host. The present disclosure also provides an advisory service with recommended management actions and other alerts and notifications.Type: ApplicationFiled: October 29, 2018Publication date: June 17, 2021Inventors: Wen-Liang Chen, Hsiao-Ching Lee, Chia-Heng Lin, Cheng-Hung Wu, Chun-Wei Liang, Tzu-Hsuan Lin, Tiffany Huang, Yi-Ting Chou, Ferng-Chang Chang, Peng-Tzu Chen, Chia-Hsuan Lin, Jung-Yu Liu, Chen-Chuan Wu, Tien-Yu Chang, Yu-Chiao Lo, Kai-Hsiang Su, Ying-Xin Li, Ming-Jie Guo
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Publication number: 20110018488Abstract: A frequency-changing control apparatus includes a rectification circuit, a control circuit, and a frequency-changing driving circuit. The control circuit includes a microprocessor. The frequency-changing control apparatus has variable voltage variable frequency for driving a motor. A temperature detection unit and an alarm device are connected to the microprocessor. The temperature detection unit is able to detect the temperature of the circumstance and convert a temperature value into a signal to be transmitted to the microprocessor for generating an alarm effect via the alarm device so that the operator could know the time of maintenance beforehand, preventing the apparatus from stopping suddenly because of superheat. The present invention is able to decrease the reject rate, reduce the loss of material, and cut down the maintenance cost.Type: ApplicationFiled: July 22, 2009Publication date: January 27, 2011Inventor: Chia-Hsuan LIN
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Publication number: 20090102991Abstract: A liquid crystal display panel is provided. The liquid crystal display panel includes a plurality of pixel units, a first common voltage region and a second common voltage region. The pixel units include a first group of pixel units and a second group of pixel units arranged in rows and columns. The first common voltage region carries a first alternating current thereon and is electrically connected to the first group of pixel units. The second common voltage region carries a second alternating current thereon and is electrically connected to the second group of pixel units.Type: ApplicationFiled: December 14, 2007Publication date: April 23, 2009Applicant: AU OPTRONICS CORPORATIONInventors: Yung-Jen Chen, Jung-Ching Chen, Chia-Hsuan Lin
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Patent number: D699060Type: GrantFiled: March 14, 2013Date of Patent: February 11, 2014Assignee: SHC Technology Co., Ltd.Inventors: Johann Geiger, Yu-Chih Chou, Chia-Hsuan Lin, I-Chun Liao