Patents by Inventor Chia-Hsun Lu

Chia-Hsun Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10763308
    Abstract: A driving substrate includes a substrate, a plurality of active devices, a thermal-conducting pattern layer and a buffer layer. The active devices are separately arranged on the substrate. Each active device includes a gate, a channel layer, a gate insulation layer, a source and a drain. The source and the drain expose a portion of the channel layer to define a channel region. The thermal-conducting pattern layer is disposed on the substrate and includes at least one thermal-conducting body and at least one thermal-conducting pattern connected to the thermal-conducting body. The thermal-conducting pattern corresponds to a location of at least one of the channel region, the channel layer, the gate, the source and the drain and each active device. The buffer layer is disposed on the substrate and covers the thermal-conducting pattern layer, and is located between the thermal-conducting pattern and each active device.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: September 1, 2020
    Assignee: E Ink Holdings Inc.
    Inventors: Wei-Shih Ni, Tai-Kai Chen, Chia-Hsun Lu
  • Publication number: 20190123108
    Abstract: A driving substrate includes a base material, a plurality of active devices, a thermal-conducting pattern layer and a buffer layer. The active devices are separately arranged on the base material. Each active device includes a gate, a channel layer, a gate insulation layer, a source and a drain. The source and the drain expose a portion of the channel layer to define a channel region. The thermal-conducting pattern layer is disposed on the substrate and includes at least one thermal-conducting body and at least one thermal-conducting pattern connected to the thermal-conducting body. The thermal-conducting pattern corresponds to a location of at least one of the channel region, the channel layer, the gate, the source and the drain and each active device. The buffer layer is disposed on the substrate and covers the thermal-conducting pattern layer, and is located between the thermal-conducting pattern and each active device.
    Type: Application
    Filed: October 8, 2018
    Publication date: April 25, 2019
    Applicant: E Ink Holdings Inc.
    Inventors: Wei-Shih Ni, Tai-Kai Chen, Chia-Hsun Lu