Abstract: A touch panel is disclosed. The touch panel includes a substrate, a touch sensing array, a first pad set, a second pad set, several first traces, and several second traces. The touch sensing array, the first pad set, the second pad set, the first traces, and the second traces are disposed on the substrate. The first pad set includes several first pads, and the second pad set includes several second pads. The touch sensing array locates between the first pad set and the second pad set, and the first pads and the second pads are in point symmetric arrangement with respective to the touch sensing array. The first traces are electrically connected between the first pads and the touch sensing array, and the second traces are electrically connected between the second pads and the touch sensing array.

Abstract: A pixel structure of a display is disclosed. The pixel structure of the display comprises at least an unit pixel. The unit pixel comprises a plurality of X type light-impenetrable regions and a plurality of light-penetrable regions, or the unit pixel comprises a plurality of X type first light-impenetrable regions, a plurality of X type second light-impenetrable regions and a plurality of light-penetrable regions. The pixel structure of the display of this invention provides good transmittance. In addition, the pixel structure of the display produces four domains or even eight domains. As a result, the problem of color shift can be improved.

Abstract: An in-plane switching (IPS) liquid crystal display panel and a method for manufacturing the same are disclosed. The method comprises the following steps: forming gate lines, data lines, common lines, pixel electrodes and common electrodes on a first substrate in sequence, wherein at least a portion of each of the common lines is positioned above each of the gate lines; and forming a liquid crystal layer between the first substrate and a second substrate.

Abstract: An integrated gate driver circuit receives a plurality of clocks and includes a plurality of driving units cascaded in series. Each driving unit is for driving a load and includes an input terminal, an output terminal, a first switch and a second switch. The first switch has a first terminal coupled to the input terminal, a second terminal coupled to a first node, and a control terminal receiving a first clock, and the first switch is turned on when the first clock is at high level. The second switch has a first terminal receiving a second clock, a second terminal coupled to the output terminal, and a control terminal coupled to the first node, wherein the second clock charges and discharges the load through the second switch when the first node is at high level; wherein the output terminal of each driving unit is coupled to the input terminal of the immediately succeeding driving unit.

Abstract: A liquid crystal display (LCD), a controller and a driving method of a panel thereof are provided. Before the controller drives each data line, the driving polarity of the data lines is adjusted according to the display property of the sub-frame data signal. A first inversion driving method is employed for adjusting the data lines when the display property of the sub-frame data signal is a black frame, and a second inversion driving method is employed for adjusting when the display property of the sub-frame data signal is a color frame. Accordingly, power consumption can be lowered during the process of driving pixels, thereby achieving the purpose of power saving while not affecting the display quality.

Abstract: There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode.

Abstract: A data line repair structure for a liquid crystal display panel is disclosed. The data line repair structure includes a first repair line parallel to the scan line and crossing a first end of the data line; a fourth repair line formed in an oblique line area of the liquid crystal panel, coupled to the first repair line; a second repair line parallel to the data line, coupled to the gate driving chip and the fourth repair line; a third repair line parallel to the scan line, coupled to the second repair line and separated from a second end of the data line; and a floating line connected between the third repair line and the second end of the data line when the data line has a broken point.

Abstract: A fringe field switching liquid crystal display apparatus is provided. This apparatus includes a first electrode and a second electrode. The first electrode includes a first side edge, a second side edge and plural strips defining plural spacings between the first and the second side edges. Each of the plural strips is formed between two of the plural spacings, and each of the plural spacings has two ends. The second electrode is disposed in a stacked relationship with the first electrode, and includes at least a penetrating vacancy with a projection, which overlaps one of the two ends of one of the plural spacings.

Abstract: A data line repair structure for a liquid crystal display panel is disclosed. The data line repair structure includes a first repair line parallel to the scan line and crossing a first end of the data line; a fourth repair line formed in an oblique line area of the liquid crystal panel, coupled to the first repair line; a second repair line parallel to the data line, coupled to the gate driving chip and the fourth repair line; a third repair line parallel to the scan line, coupled to the second repair line and separated from a second end of the data line; and a floating line connected between the third repair line and the second end of the data line when the data line has a broken point.

Abstract: A pixel array includes a plurality of pixels, data lines, readout lines and gate lines, wherein a data line and a readout line are alternatively disposed between every two adjacent pixels; two pixels adjacent to each data line are coupled to the same data line but coupled to different gate lines; and at least a part of the readout lines are coupled to one of the two pixels adjacent thereto. The present invention further provides a touch panel including the above pixel array.

Abstract: A pixel, according to the invention, comprises a pixel electrode, a data line, and a switch element. The switch element comprises a gate electrode, a first electrode, a second electrode, and a semiconductor layer. The first electrode is electrically connected to the pixel electrode and comprises a first portion and a second portion. The second portion has a curved structure and comprises a first terminal connected to the first portion and a second terminal. The first terminal of the second portion is substantially aligned with the second terminal thereof. The second electrode is electrically connected to the data line. The second electrode forms or the second electrode and the data line together form a concave area where the first electrode is disposed in. The semiconductor layer is disposed between the first electrode, the second electrode, and the gate electrode.

Abstract: A data line repair structure for a liquid crystal display panel is disclosed. The data line repair structure includes a first repair line parallel to the scan line and crossing a first end of the data line; a fourth repair line formed in an oblique line area of the liquid crystal panel, coupled to the first repair line; a second repair line parallel to the data line, coupled to the gate driving chip and the fourth repair line; a third repair line parallel to the scan line, coupled to the second repair line and separated from a second end of the data line; and a floating line connected between the third repair line and the second end of the data line when the data line has a broken point.

Abstract: A TFT array substrate includes gate lines, data lines, and first and second common lines. The gate lines are disposed on a transparent substrate. The first gate lines to the N+1-th gate lines are arranged in order, and N is a positive number. The data lines cross the gate lines. There is no pixel region defined by the N-th and N+1-th gate lines and adjacent two of the data lines, when N is an even number. There are two pixel regions being left and right pixel region defined by the N-th and N+1-th gate lines and adjacent two of the data lines, when N is an odd number. The first common lines are parallel to the gate lines. The second common lines are parallel to the data lines and electrically connected to the first common lines, wherein each second common line is disposed between the left and right pixel regions.

Abstract: Fringe field switching mode liquid crystal display (FFS LCD) devices are disclosed. A first substrate is disposed opposing a second substrate with a gap therebetween. A liquid crystal layer is interposed between the first and the second substrate. A gate line and data lines are formed on the first substrate in a matrix configuration and defining pixel areas. A counter electrode is disposed on each pixel area of the first substrate. A pixel electrode is disposed above the counter electrode with an insulating layer therebetween. The pixel electrode includes a plurality of parallel electrodes. Each electrode includes a first segment, a second segment, and a third segment, wherein the first segment has an included angle ? from the horizontal direction, the second segment has an included angle ? from the horizontal direction, and the first segment has an included angle ? from the horizontal direction.

Abstract: A fringe field switching liquid crystal display apparatus is provided. This apparatus includes a first electrode disposed in a stacked relationship with a second electrode. The first electrode includes a first side edge, a second side edge, and plural spaces that define plural strips between the first and the second side edges, wherein the plural strips and the plural spacings form a first area. The second electrode is disposed on one of places above and below the first electrode, and has at least a penetrating vacancy or other capacitance-reduction device, which has a projection onto the first electrode located outside the first area.

Abstract: A display apparatus comprises a substrate, a first lead, a second lead and a third lead. The first lead and second lead are provided on the substrate and intersect at a first overlapping area. The third lead surrounds the first overlapping area where the first lead and second lead cross each other. The third lead intersects the first lead respectively at a second overlapping area and a third overlapping area.

Abstract: Fringe field switching mode liquid crystal display (FFS LCD) devices are disclosed. A first substrate is disposed opposing a second substrate with a gap therebetween. A liquid crystal layer is interposed between the first and the second substrate. A gate line and data lines are formed on the first substrate in a matrix configuration and defining pixel areas. A counter electrode is disposed on each pixel area of the first substrate. A pixel electrode is disposed above the counter electrode with an insulating layer therebetween. The pixel electrode includes a plurality of parallel electrodes. Each electrode includes a first segment, a second segment, and a third segment, wherein the first segment has an included angle ? from the horizontal direction, the second segment has an included angle ? from the horizontal direction, and the first segment has an included angle ? from the horizontal direction.

Abstract: Fringe field switching mode liquid crystal display (FFS LCD) devices are disclosed. A first substrate is disposed opposing a second substrate with a gap therebetween. A liquid crystal layer is interposed between the first and the second substrate. A gate line and data lines are formed on the first substrate in a matrix configuration and defining pixel areas. A counter electrode is disposed on each pixel area of the first substrate. A pixel electrode is disposed above the counter electrode with an insulating layer therebetween. The pixel electrode includes a plurality of parallel electrodes. Each electrode includes a first segment, a second segment, and a third segment, wherein the first segment has an included angle ? from the horizontal direction, the second segment has an included angle ? from the horizontal direction, and the first segment has an included angle ? from the horizontal direction.

Abstract: A pixel arrangement method for a liquid crystal display includes the steps of: inputting data signals with different driving polarities to odd data lines and even data lines respectively; and changing connections between a gate of thin film transistor and gate lines and connections between a source of thin film transistor and data lines in every pixel area whereby the driving polarity is inverted every two pixel areas in a transverse direction and is inverted every pixel area in a longitudinal direction. The present invention further provides a liquid crystal display.

Abstract: An array substrate for FFS type LCD panel includes a transparent substrate, gate lines, a gate insulating layer, data lines, pixel electrodes, a passivation layer and a common electrode. The gate lines are disposed on the transparent substrate. The gate insulating layer is disposed on the transparent substrate and covers the gate lines. The data lines are disposed on the gate insulating layer. The pixel electrodes are disposed on the gate insulating layer, wherein the pixel electrodes and the data lines are located on the same level. The passivation layer is disposed on the gate insulating layer and covers the pixel electrodes and the data lines. The common electrode is disposed on the passivation layer.