Patents by Inventor Chia-Huan Huang

Chia-Huan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002528
    Abstract: A memory device is provided, including a first bit cell including a first memory cell coupled to a first word line and a second bit cell including a second memory cell coupled to a second word line. The first and second memory cells are coupled to a first control line and further coupled to a first bit line through first and second nodes. The second bit cell further includes a first protection array coupled to the second memory cell at the second node coupled to the first bit line and further coupled to a third word line. When the first and second bit cells operate in different operational types, the first protection array is configured to generate an adjust voltage to the second node according to a voltage level of the third word line while the first bit cell is programmed.
    Type: Grant
    Filed: June 30, 2023
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Gu-Huan Li, Tung-Cheng Chang, Perng-Fei Yuh, Chia-En Huang, Chun-Ying Lee, Yih Wang
  • Patent number: 11990474
    Abstract: A method of fabricating a semiconductor device includes forming a gate structure, a first edge structure and a second edge structure on a semiconductor strip. The method further includes forming a first source/drain feature between the gate structure and the first edge structure. The method further includes forming a second source/drain feature between the gate structure and the second edge structure, wherein a distance between the gate structure and the first source/drain feature is different from a distance between the gate structure and the second source/drain feature. The method further includes implanting a buried channel in the semiconductor strip, wherein the buried channel is entirely below a top-most surface of the semiconductor strip, a maximum depth of the buried channel is less than a maximum depth of the first source/drain feature, and a dopant concentration of the buried channel is highest under the gate structure.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu Fang Fu, Chi-Feng Huang, Chia-Chung Chen, Victor Chiang Liang, Fu-Huan Tsai
  • Patent number: 11955191
    Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang
  • Publication number: 20240088224
    Abstract: A semiconductor structure includes a first gate structure, a second gate structure coupled to the first gate structure, a source region, a first drain region, and a second drain region. The source region is surrounded by the first gate structure and the second gate structure. The first drain region is separated from the source region by the first gate structure. The second drain region is separated from the source region by the second gat structure. A shape of the first drain region and a shape of the second drain region are different from each other from a plan view.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Inventors: HSING-I TSAI, FU-HUAN TSAI, CHIA-CHUNG CHEN, HSIAO-CHUN LEE, CHI-FENG HUANG, CHO-YING LU, VICTOR CHIANG LIANG
  • Patent number: 11467202
    Abstract: The disclosure provides an electronic device and a diagnosis method of a light-emitting device. The light-emitting device includes at least one region, and each region of the at least one region has a plurality of light-emitting units. The diagnosis method includes the following steps. A plurality of light-emitting units of one of the at least one region are illuminated by a current. A voltage value corresponding to the current is compared with a first standard voltage value corresponding to a first standard current corresponding to the one of the at least one region. Whether the one of the at least one region is abnormal is determined according to a result of comparing the voltage value with the first standard voltage value. Therefore, the diagnosis method of the disclosure may effectively diagnose whether the at least one region of the light-emitting device is abnormal.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: October 11, 2022
    Assignee: Innolux Corporation
    Inventors: Yu-Ming Huang, Yi-Cheng Chang, Chia-Huan Huang
  • Publication number: 20210088575
    Abstract: The disclosure provides an electronic device and a diagnosis method of a light-emitting device. The light-emitting device includes at least one region, and each region of the at least one region has a plurality of light-emitting units. The diagnosis method includes the following steps. A plurality of light-emitting units of one of the at least one region are illuminated by a current. A voltage value corresponding to the current is compared with a first standard voltage value corresponding to a first standard current corresponding to the one of the at least one region. Whether the one of the at least one region is abnormal is determined according to a result of comparing the voltage value with the first standard voltage value. Therefore, the diagnosis method of the disclosure may effectively diagnose whether the at least one region of the light-emitting device is abnormal.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 25, 2021
    Applicant: Innolux Corporation
    Inventors: Yu-Ming Huang, Yi-Cheng Chang, Chia-Huan Huang