Patents by Inventor Chia-Huang Fu

Chia-Huang Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8559653
    Abstract: A multi-channel decoding method includes: receiving an input signal to generate a channel output signal; providing a first test signal serving as the input signal in a first calibration mode; and adjusting a DC voltage level of the channel output signal with a first calibration signal by reducing a difference between a first predetermined reference signal level and a DC voltage level of the channel output signal generated from the first test signal.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: October 15, 2013
    Assignee: Mediatek Inc.
    Inventors: Chieh-Hung Chen, Tsung-Ling Li, Chia-Huang Fu
  • Publication number: 20120076309
    Abstract: A multi-channel decoding method includes: receiving an input signal to generate a channel output signal; providing a first test signal serving as the input signal in a first calibration mode; and adjusting a DC voltage level of the channel output signal with a first calibration signal by reducing a difference between a first predetermined reference signal level and a DC voltage level of the channel output signal generated from the first test signal.
    Type: Application
    Filed: December 1, 2011
    Publication date: March 29, 2012
    Inventors: Chieh-Hung Chen, Tsung-Ling Li, Chia-Huang Fu
  • Patent number: 8094836
    Abstract: A multi-channel decoding method includes: receiving an input signal to generate a first channel output signal and a second channel output signal, wherein the input signal is mixed with a specific clock signal; and gradually changing an amplitude of the specific clock signal from a first value to a second value when switching from a first mode corresponding to a first number of channels to a second mode corresponding to a second number of channels. Systems utilizing the method and another method further comprising calibration are also disclosed.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: January 10, 2012
    Assignee: Mediatek Inc.
    Inventors: Chieh-Hung Chen, Tsung-Ling Li, Chia-Huang Fu
  • Patent number: 7957698
    Abstract: A calibration circuit for calibrating an output level of a demodulator includes a test signal generator, an RSSI module and a calibration module. The test signal generator generates a test signal, and the RSSI module detects the test signal to generate a control signal, wherein the control signal controls the demodulator to process the test signal to generate a determined output signal. The calibration module then calibrates the RSSI module according to the output signal in order to calibrate the output level of the demodulator. When the control signal is utilized to selectively enable or disable a soft-mute function of the demodulator, the calibration module can be utilized to calibrate or determine the soft-mute function of the demodulator.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: June 7, 2011
    Assignee: Mediatek Inc.
    Inventors: Tsung-Ling Li, Hsiang-Hui Chang, Chia-Huang Fu, En-Hsiang Yeh, Hsueh-Kun Liao, Chieh-Hung Chen
  • Publication number: 20090252337
    Abstract: A multi-channel decoding method includes: receiving an input signal to generate a first channel output signal and a second channel output signal, wherein the input signal is mixed with a specific clock signal; and gradually changing an amplitude of the specific clock signal from a first value to a second value when switching from a first mode corresponding to a first number of channels to a second mode corresponding to a second number of channels. Systems utilizing the method and another method further comprising calibration are also disclosed.
    Type: Application
    Filed: April 8, 2008
    Publication date: October 8, 2009
    Inventors: Chieh-Hung Chen, Tsung-Ling Li, Chia-Huang Fu
  • Publication number: 20090233566
    Abstract: A calibration circuit for calibrating an output level of a demodulator includes a test signal generator, an RSSI module and a calibration module. The test signal generator generates a test signal, and the RSSI module detects the test signal to generate a control signal, wherein the control signal controls the demodulator to process the test signal to generate a determined output signal. The calibration module then calibrates the RSSI module according to the output signal in order to calibrate the output level of the demodulator. When the control signal is utilized to selectively enable or disable a soft-mute function of the demodulator, the calibration module can be utilized to calibrate or determine the soft-mute function of the demodulator.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Inventors: Tsung-Ling Li, Hsiang-Hui Chang, Chia-Huang Fu, En-Hsiang Yeh, Hsueh-Kun Liao, Chieh-Hung Chen
  • Publication number: 20080007361
    Abstract: An oscillator, comprising an LC tank circuit and a negative resistance circuit. The negative resistance circuit is coupled to the LC tank circuit and comprises a pair of transistors and a pair of voltage drop generators. The transistors have first terminals and second terminals, wherein the first terminals are cross-coupled to the second terminals thereof. The voltage drop generators are respectively coupled between the first and second terminals of the transistors.
    Type: Application
    Filed: January 29, 2007
    Publication date: January 10, 2008
    Applicant: MEDIATEK INC.
    Inventor: Chia-Huang Fu