Patents by Inventor Chia-Hung Cheng

Chia-Hung Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10445883
    Abstract: An apparatus includes a processor circuit and an ID recycle circuit. The processor circuit may be configured to generate a component table while performing connected-component labeling on a digital image. The ID recycle circuit is generally in communication with the processor circuit. The ID recycle circuit may be configured to minimize a number of entries in the component table generated by the processor circuit.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: October 15, 2019
    Assignee: Ambarella, Inc.
    Inventors: Yen-Hsu Shih, Chia-Hung Cheng
  • Publication number: 20030141591
    Abstract: The present invention relates to an under bump structure comprising a wafer surface including a plurality of pads; a plurality of passivation layers covering the wafer surface around the pads; a dielectric layer covering the wafer surface and the passivation layers, each of the passivation layer and the dielectric layer having a first opening at a position corresponding to that of each pad for exposing the pad; and an under bump metallurgy layer covering the dielectric layer, the pads and the passivation layers to connect the pads.
    Type: Application
    Filed: January 27, 2003
    Publication date: July 31, 2003
    Inventors: Chih-Hsiang Hsu, Shih-Kuang Chen, Chia-Hung Cheng, Min-Lung Huang