Abstract: Uplink transmission performed by a UE is provided. The UE receives configured grant (CG) configurations for allocating a group of Physical Uplink Shared Channel (PUSCH) durations in a bandwidth part (BWP), each configured grant configuration having a priority level corresponding to the allocated PUSCH duration, wherein at least two of the PUSCH durations in the group overlap in a time domain; identifies a set of PUSCH durations for transmitting a medium access control (MAC) protocol data unit (PDU) generated from available data from the group of PUSCH durations; selects a PUSCH duration from the identified set of PUSCH durations as a prioritized PUSCH duration based on a comparison of the priority levels corresponding to the identified set of PUSCH durations; and transmits the MAC PDU, via the transceiver, on the prioritized PUSCH duration.

Abstract: A foldable support, wherein the foldable support comprises two first supporting members, two second supporting members, two first assembly portions, and two second assembly portions. The first supporting members are able to be rotatably unfolded relative to the second supporting members or be drawn together and folded up. First linking members are respectively movable connected to the two first assembly portions close to the ends of a second supporting arm, and the other ends of the two second linking members are respectively correspondingly hinged to the two second supporting members. The two second assembly portions are respectively correspondingly hinged to the two second supporting members, and each of the second assembly portions, close to the ends of the first supporting arm, are movable connected to first linking members. The two first linking members are respectively correspondingly hinged to the two first supporting members.

Abstract: A semiconductor structure includes substrate, semiconductor layers, source/drain features, metal oxide layers, and a gate structure. The semiconductor layers extend in an X-direction and over the substrate. The semiconductor layers are spaced apart from each other in a Z-direction. The source/drain features are on opposite sides of the semiconductor layers in the X-direction. The metal oxide layers cover bottom surfaces of the semiconductor layers. The gate structure wraps around the semiconductor layers and the metal oxide layers. The metal oxide layers are in contact with the gate structure.

Abstract: A method and system for power management and scheduling based on human interface device (HID) input types. A user input is received via an HID, and an HID input type of the user input is determined. The HID input type is then provided to a power management controller and/or an operating system scheduler, and power management and/or scheduling are performed based on the HID input type. An operating frequency of a processor or a processor core of the system may be adjusted based on the HID input type. One of the processor cores in a hybrid system such as a P-core or an E-core may be selected for a task based on the HID input type.

Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.

Abstract: A method for handling Hybrid Automatic Repeat reQuest (HARQ) feedback transmissions includes a User Equipment (UE) receiving, from a Base Station (BS), Downlink Control Information (DCI) on a Physical Downlink Control Channel (PDCCH). The DCI schedules a reception of Downlink (DL) data on a Physical Downlink Shared Channel (PDSCH). The method further includes the UE determining whether to transmit a HARQ feedback for the DL data according to the DCI.

Abstract: An apparatus includes a processor circuit and an ID recycle circuit. The processor circuit may be configured to generate a component table while performing connected-component labeling on a digital image. The ID recycle circuit is generally in communication with the processor circuit. The ID recycle circuit may be configured to minimize a number of entries in the component table generated by the processor circuit.

Abstract: The present invention relates to an under bump structure comprising a wafer surface including a plurality of pads; a plurality of passivation layers covering the wafer surface around the pads; a dielectric layer covering the wafer surface and the passivation layers, each of the passivation layer and the dielectric layer having a first opening at a position corresponding to that of each pad for exposing the pad; and an under bump metallurgy layer covering the dielectric layer, the pads and the passivation layers to connect the pads.