Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A system includes one or more data processors configured to run a basic input/output system (BIOS) service and a bootloader configuration manager for tuning kernel parameters. The system further includes a non-transitory computer-readable storage medium containing instructions which, when executed on the one or more data processors, cause the one or more data processors to perform operations. The operations include receiving administrative inputs and checking the administrative inputs against a checklist to determine whether any errors are introduced by the administrative inputs. The operations further include writing the administrative inputs to a temporal configuration file in response to no errors being introduced by the administrative inputs. The operations further include exporting the temporal configuration file to a designated output path. The exported temporal configuration file includes kernel parameter settings for configuring a bootloader of a computing device.

Abstract: A system and method for maximizing bandwidth in an uplink for a 5G communication system is disclosed. Multiple end devices generate image streams. A gateway is coupled to the end devices. The gateway includes a gateway monitor agent collecting utilization rate data of the gateway and an image inspector collecting inspection data from the received image streams. An edge server is coupled to the gateway. The edge server includes an edge server monitor agent collecting utilization rate data of the edge server. An analytics manager is coupled to the gateway and the edge server. The analytics manager is configured to determine an allocation strategy based on the collected utilization rate data from the gateway and the edge server.

Abstract: A touch sensing structure is provided. The touch sensing structure includes a substrate, a plurality of first conductive traces and a second conductive trace. The plurality of first conductive traces is formed on the substrate. Each of the first conductive trace includes a trunk and at least one branch. The trunks of the first conductive traces are disposed to be parallel with each other. The branch of each first conductive trace is extended from one side of the trunk toward the adjacent first conductive trace. The branches between the two adjacent first conductive traces are disposed to be opposite and alternative. A path is composed of the two adjacent trunks and the branches disposed to be opposite and alternative. The second conductive trace is formed on the substrate, disposed between the two adjacent first conductive traces and extended along the path.

Abstract: A method for manufacturing a capacitive touch panel has steps of providing a substrate, delimiting at least one preset zone on the substrate, forming multiple first-axis sensing units and multiple second-axis sensing units on one of the surfaces of the substrate, forming at least one set of connection circuit and at least one die pad on the other surface of the substrate, forming multiple first conductive vias through the substrate with at least one of the first conductive vias located within the preset zone for the second-axis sensing units to be mutually connected by the first conductive vias to form multiple second-axis sensing lines, and bonding a controller with an LQFP (Low Profile Quad) package or a TQFP (Thin Quad Flat) package on the at least one die pad within the preset zone to ensure enough space available to form the at least one first conductive via on the bottom of the controller.

Abstract: A touch sensing structure is provided. The touch sensing structure includes a substrate, a plurality of first conductive traces and a second conductive trace. The plurality of first conductive traces is formed on the substrate. Each of the first conductive trace includes a trunk and at least one branch. The trunks of the first conductive traces are disposed to be parallel with each other. The branch of each first conductive trace is extended from one side of the trunk toward the adjacent first conductive trace. The branches between the two adjacent first conductive traces are disposed to be opposite and alternative. A path is composed of the two adjacent trunks and the branches disposed to be opposite and alternative. The second conductive trace is formed on the substrate, disposed between the two adjacent first conductive traces and extended along the path.

Abstract: A method for manufacturing a capacitive touch panel has steps of providing a substrate, delimiting at least one preset zone on the substrate, forming multiple first-axis sensing units and multiple second-axis sensing units on one of the surfaces of the substrate, forming at least one set of connection circuit and at least one die pad on the other surface of the substrate, forming multiple first conductive vias through the substrate with at least one of the first conductive vias located within the preset zone for the second-axis sensing units to be mutually connected by the first conductive vias to form multiple second-axis sensing lines, and bonding a controller with an LQFP (Low Profile Quad) package or a TQFP (Thin Quad Flat) package on the at least one die pad within the preset zone to ensure enough space available to form the at least one first conductive via on the bottom of the controller.

Abstract: A method for memory controlling is disclosed. It includes an embedded address generator and a controlling scheme of burst terminates burst, which could erase the latency caused by bus interface during the access of non-continuous addresses. Moreover, it includes a controlling scheme of anticipative row activating, which could reduce the latency across different rows of memory by data access. The method could improve the access efficiency and power consumption of memory.

Abstract: A method for memory controlling is disclosed. It includes an embedded address generator and a controlling scheme of burst terminates burst, which could erase the latency caused by bus interface during the access of non-continuous addresses. Moreover, it includes a controlling scheme of anticipative row activating, which could reduce the latency across different rows of memory by data access. The method could improve the access efficiency and power consumption of memory.