Patents by Inventor Chia-Jun Chang

Chia-Jun Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260172070
    Abstract: A transceiver device includes a transmitter circuit and a receiver circuit. The transmitter circuit is configured to couple an antenna and includes a first mixer and a first buffer circuit. The first mixer is configured to output a first radio frequency signal according to a first baseband signal and a first local oscillator signal. The first buffer circuit is configured to output the first local oscillator signal to the first mixer and includes a plurality of first buffers. The receiver circuit is configured to couple the antenna. A first buffers-coupled-in-parallel quantity of the first buffer circuit is adjusted according to an operation condition.
    Type: Application
    Filed: November 25, 2025
    Publication date: June 18, 2026
    Inventors: Ping-Hsuan TSAI, Po-Chih WANG, Chia-Jun CHANG
  • Patent number: 12647093
    Abstract: A balun includes a first coil, a second coil, a third coil, a fourth coil, and a capacitor. The first coil is coupled between an unbalanced pin and a first ground terminal. The second coil is coupled between the first ground terminal and a second ground terminal. The third coil is coupled between a first balanced pin and a connection point and is inductively coupled to the first coil. The fourth coil is coupled between the connection point and a second balanced pin and is inductively coupled to the second coil. The capacitor is coupled between the connection point and a third ground terminal.
    Type: Grant
    Filed: June 4, 2024
    Date of Patent: June 2, 2026
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Patent number: 12609727
    Abstract: A wireless transceiver device and matching circuits thereof are provided. In the wireless transceiver device, a first matching circuit is electrically coupled to an antenna and a transmission circuit. In the first matching circuit, a first capacitor is electrically coupled to the antenna and a first switching component, the first switching component is electrically coupled to a reference voltage, a first active component having a first threshold voltage is coupled in parallel with the first switching component, a first inductor of an inductor pair is electrically coupled to the antenna and the reference voltage, and a second inductor of the inductor pair is electrically coupled to the transmission circuit. When the voltage across the first active component is greater than the first threshold voltage, the first active component is turned on, thus reducing the voltage across the first switching component to protect the first switching component.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: April 21, 2026
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Yi Lee, Chia-Jun Chang
  • Patent number: 12597903
    Abstract: The present invention provides a filter configured to receive an input signal to generate a filtered signal. The filter includes a first component, a first capacitor and a second component. The first component is coupled between the input signal and a first terminal. The first capacitor is coupled between the first terminal and a second terminal. For the second component, a first node of the second component is coupled to the second terminal, and a second node of the second component is used to output the filtered signal. The first component and the second component are inductive components.
    Type: Grant
    Filed: April 14, 2024
    Date of Patent: April 7, 2026
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Patent number: 12573996
    Abstract: An RC calibration method and an RC calibration circuit are provided. The method includes: providing an RC calibration circuit; calculating a ratio of an input period of an input clock signal to an initial period, and configuring the processing circuit to perform a calibration process including: adjusting a first current source, a second current source, and/or an adjustment factor of the input period according to the ratio, so as to satisfy a specified RC product, or adjusting a resistance and/or a capacitance of the specified RC product; controlling the first current source to charge a to-be-calibrated capacitor; and determining whether a comparison signal indicates that first and second voltages meet a calibration completion condition, and if not, adjusting the to-be-calibrated resistor and/or the to-be-calibrated capacitor until the comparison signal indicates that the first and second voltages meet the calibration completion condition.
    Type: Grant
    Filed: April 17, 2024
    Date of Patent: March 10, 2026
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ruo-Hsuan Gao, Chia-Jun Chang
  • Publication number: 20260066929
    Abstract: A wireless communication chip includes an amplifier stage, a first radio frequency circuit, and a second radio frequency circuit. The amplifier stage is configured to receive and amplify a radio frequency signal. The first radio frequency circuit includes a mixer, a baseband transconductor, an output stage, and a switch unit. The mixer is configured to receive an oscillation signal and the radio frequency signal from the amplifier stage, and is configured to adjust a frequency of the radio frequency signal based on the oscillation signal. The switch unit is electrically connected between an input terminal of the baseband transconductor and an output terminal of the baseband transconductor. The first radio frequency circuit and the second radio frequency circuit support different wireless transmission technologies, and are jointly coupled to an output terminal of the amplifier stage.
    Type: Application
    Filed: September 2, 2025
    Publication date: March 5, 2026
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yang Chang, Jon-Jin Chen, Chia-Jun Chang
  • Publication number: 20250309936
    Abstract: A radio frequency (RF) transceiver circuit includes a pre-distortion processing circuit, wherein the pre-distortion processing circuit includes a first filter, a mixer, a second filter, an analog-to-digital converter, and a digital processing circuit. The first filter filters a feedback signal to filter out harmonic components of the feedback signal in order to generate a filtered signal. The mixer performs a down-conversion operation upon the filtered signal via an oscillation signal to generate a mixed signal. The second filter performs a low-pass filtering operation upon the mixed signal to generate a low-pass filtered signal. The analog-to-digital converter performs an analog-to-digital conversion operation upon the low-pass filtered signal to generate a digital signal, in order for the digital processing circuit to generate a compensation signal for performing a pre-distortion compensation operation.
    Type: Application
    Filed: March 6, 2025
    Publication date: October 2, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Ping-Hsuan Tsai, Chia-Jun Chang
  • Patent number: 12413211
    Abstract: A frequency mixing circuit includes: a first transistor and a second transistor. The first transistor has a control terminal, a first terminal and a second terminal. The control terminal of the first transistor is configured to receive an oscillation signal, the first terminal of the first transistor is configured to output a mixed signal, and the second terminal of the first transistor is configured to receive a source signal. The second transistor has a control terminal, a first terminal and a second terminal. The control terminal of the second transistor is coupled to the second terminal of the first transistor, the first terminal of the second transistor is coupled to the first terminal of the first transistor, and the second terminal of the second transistor is coupled to the control terminal of the first transistor.
    Type: Grant
    Filed: September 6, 2023
    Date of Patent: September 9, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Patent number: 12388422
    Abstract: A resistive attenuator and a method for improving linearity of the resistive attenuator are provided. The resistive attenuator includes a first transistor, an attenuation circuit and a compensation circuit, wherein both the first transistor and the attenuation circuit are coupled between an input terminal and an output terminal of the resistive attenuator, and the compensation circuit is coupled to the first transistor. The first transistor is configured to provide a first signal path between the input terminal and the output terminal. The attenuation circuit is configured to provide a second signal path between the input terminal and the output terminal, wherein signal attenuation of the second signal path is greater than signal attenuation of the first signal path. The compensation circuit is configured to compensate nonlinear distortion caused by the first transistor.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: August 12, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Patent number: 12334887
    Abstract: The present invention discloses a variable gain amplifier circuit having linearity compensation mechanism is provided. A lower amplification transistor of a lower branch of an amplification circuit is controlled by an AC input signal. Upper amplification transistors of an upper branch generate an AC output signal at an amplification output terminal. An amplification control circuit controls the turn-on and turn-off of the upper amplification transistor according to an amplification control voltage. An inductor is electrically coupled between a power supply terminal and the amplification output terminal. In a gain adjustment circuit, each of adjustment control circuits controls the turn-on and turn-off of each of adjustment transistors according to a adjustment control voltage. A first voltage adjustment circuit adjusts an impedance of each of the adjustment transistors to further adjust an AC cross voltage relation between the lower amplification transistor and the upper amplification transistors.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: June 17, 2025
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yang Chang, Chia-Jun Chang
  • Publication number: 20250141422
    Abstract: A balun includes a first coil, a second coil, a third coil, a fourth coil, and a capacitor. The first coil is coupled between an unbalanced pin and a first ground terminal. The second coil is coupled between the first ground terminal and a second ground terminal. The third coil is coupled between a first balanced pin and a connection point and is inductively coupled to the first coil. The fourth coil is coupled between the connection point and a second balanced pin and is inductively coupled to the second coil. The capacitor is coupled between the connection point and a third ground terminal.
    Type: Application
    Filed: June 4, 2024
    Publication date: May 1, 2025
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Publication number: 20250080138
    Abstract: A radio frequency (RF) transceiver circuit includes a transmission circuit, a reception circuit, and a pre-distortion processing circuit. The transmission circuit is arranged to generate a transmission signal, wherein the transmission signal is transmitted to an antenna through a first pin. The reception circuit is arranged to receive a reception signal through a second pin. The pre-distortion processing circuit is arranged to receive a feedback signal through a third pin, and calculate distortion information of the transmission signal according to the feedback signal in order to generate and transmit a compensation signal to the transmission circuit for performing a pre-distortion compensation operation, wherein the feedback signal is generated according to a coupling signal of the transmission signal.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 6, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Ping-Hsuan Tsai, Chia-Jun Chang
  • Publication number: 20250023585
    Abstract: A wireless communication device for concurrently receiving multiple types of signals and associated methods are provided. The wireless communication device includes at least one low noise amplifier (LNA), a first conversion circuit, a second conversion circuit, a first filter and a second filter. The at least one LNA amplifies an initial signal received by an antenna to generate at least one input signal, wherein the first conversion circuit and the second conversion circuit perform conversion operations according to the at least one input signal to generate a first converted signal and a second converted signal, respectively. More particularly, the first filter performs a filtering operation corresponding to a first-type signal upon the first converted signal, and the second filter performs a filtering operation corresponding to a second-type signal upon the second converted signal.
    Type: Application
    Filed: July 9, 2024
    Publication date: January 16, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Ping-Hsuan Tsai, Kuan-Yu Shih, Chia-Jun Chang
  • Patent number: 12199807
    Abstract: A wireless transceiver having an in-phase quadrature-phase (IQ) calibration function includes a transmitter, a receiver, a signal generator, and a switch circuit. The switch circuit includes a first and a second switch circuits. The first switch circuit is turned on in a receiver-end calibration process, and outputs a predetermined signal from the signal generator to the transmitter. The second switch circuit is turned on in the receiver calibration process and outputs a derivative signal of the predetermined signal from the transmitter to the receiver to let the receiver performs a receiver-end IQ calibration accordingly. The first switch circuit is turned off and the second switch circuit is turned on in a transmitter-end calibration process; the second switch circuit outputs a radio-frequency signal from the transmitter to the receiver to let the receiver generates a calibration reference accordingly; and the transmitter performs a transmitter-end IQ calibration according to the calibration reference.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: January 14, 2025
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuan-Yu Shih, Chia-Jun Chang
  • Publication number: 20240421791
    Abstract: The present invention provides a filter configured to receive an input signal to generate a filtered signal. The filter includes a first component, a first capacitor and a second component. The first component is coupled between the input signal and a first terminal. The first capacitor is coupled between the first terminal and a second terminal. For the second component, a first node of the second component is coupled to the second terminal, and a second node of the second component is used to output the filtered signal. The first component and the second component are inductive components.
    Type: Application
    Filed: April 14, 2024
    Publication date: December 19, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Publication number: 20240356513
    Abstract: An RC calibration method and an RC calibration circuit are provided. The method includes: providing an RC calibration circuit; calculating a ratio of an input period of an input clock signal to an initial period, and configuring the processing circuit to perform a calibration process including: adjusting a first current source, a second current source, and/or an adjustment factor of the input period according to the ratio, so as to satisfy a specified RC product, or adjusting a resistance and/or a capacitance of the specified RC product; controlling the first current source to charge a to-be-calibrated capacitor; and determining whether a comparison signal indicates that first and second voltages meet a calibration completion condition, and if not, adjusting the to-be-calibrated resistor and/or the to-be-calibrated capacitor until the comparison signal indicates that the first and second voltages meet the calibration completion condition.
    Type: Application
    Filed: April 17, 2024
    Publication date: October 24, 2024
    Inventors: RUO-HSUAN GAO, CHIA-JUN CHANG
  • Patent number: 12119802
    Abstract: A radio frequency transceiver device includes an antenna unit, a first matching circuit, a receiver circuit, a second matching circuit, a transmitter circuit, and an auxiliary circuit. The receiver circuit includes a mixer unit. The auxiliary circuit includes a first transformer coil and a second transformer coil. The first matching circuit and the receiver circuit are configured to form a first signal reception channel to receive, process, and transmit the first radio frequency signal to the mixer unit when the first radio frequency signal is a high gain radio frequency signal. The second matching circuit and the auxiliary circuit are configured to form a second signal reception channel to receive, process, and transmit the first radio frequency signal to the mixer unit when the first radio frequency signal is a middle-low gain radio frequency signal. Another radio frequency signal transceiver device further includes a third matching circuit.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: October 15, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Yi Lee, Kuan-Yu Shih, Chia-Jun Chang
  • Publication number: 20240235597
    Abstract: A radio frequency receiving circuit includes a first amplification circuit, an oscillation circuit, a frequency mixing and amplification circuit and a dividing circuit. The first amplification circuit is configured to amplify an input signal so as to generate an amplified input signal. The oscillation circuit is configured to provide a local oscillation signal. The frequency mixing and amplification circuit is configured to mix and amplify the amplified input signal according to the local oscillation signal. The dividing circuit is configured to form a dividing loop at a preset frequency for the amplified input signal according to the local oscillation signal when the dividing circuit is driven. A chip including the radio frequency receiving circuit and a main circuit is also provided. The main circuit is configured to drive the dividing circuit when the second input signal is determined to include a signal of the preset frequency.
    Type: Application
    Filed: October 18, 2023
    Publication date: July 11, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ruo-Hsuan GAO, Chia-Yi LEE, Chia-Jun CHANG
  • Publication number: 20240178818
    Abstract: A resistive attenuator and a method for improving linearity of the resistive attenuator are provided. The resistive attenuator includes a first transistor, an attenuation circuit and a compensation circuit, wherein both the first transistor and the attenuation circuit are coupled between an input terminal and an output terminal of the resistive attenuator, and the compensation circuit is coupled to the first transistor. The first transistor is configured to provide a first signal path between the input terminal and the output terminal. The attenuation circuit is configured to provide a second signal path between the input terminal and the output terminal, wherein signal attenuation of the second signal path is greater than signal attenuation of the first signal path. The compensation circuit is configured to compensate nonlinear distortion caused by the first transistor.
    Type: Application
    Filed: August 4, 2023
    Publication date: May 30, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Patent number: 11990269
    Abstract: An inductor device includes a first inductor, a second inductor, and at least one switch circuit. The second inductor is arranged to enclose the first inductor, and use a topmost layer metal to resist external interference for the first inductor. The at least one switch circuit is coupled to the second inductor, and is arranged to receive at least one control voltage, wherein the at least one control voltage is arranged to adjust conduction degree of the at least one switch circuit.
    Type: Grant
    Filed: November 21, 2021
    Date of Patent: May 21, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yang Chang, Chia-Yi Lee, Chia-Jun Chang