Patents by Inventor Chia-Jung Lee

Chia-Jung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120062189
    Abstract: The present invention discloses a switching regulator, and a control circuit and method for controlling a switching regulator. The switching regulator includes a power stage driven by a driver voltage outputted from a driver circuit. The present invention detects an input current to generate an input current detection signal, and adjusts an operation voltage supplied to the driver circuit according to the input current detection signal.
    Type: Application
    Filed: December 14, 2010
    Publication date: March 15, 2012
    Inventors: Ting-Hung Wang, Chia-Jung Lee
  • Patent number: 8063617
    Abstract: A per-phase quick response generation circuit generates a quick response signal to determine a quick response pulse to be inserted into a pulse width modulation signal of the corresponding phase. The quick response pulse will force the upper power switch of the corresponding phase on to increase the current supply ability during load transition. A multi-phase voltage regulator with the quick response generation circuit can have different quick response pulse widths for the interleaved phases, so as to decrease the current imbalance period of the voltage regulator after load transition.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: November 22, 2011
    Assignee: Richtek Technology Corp.
    Inventors: Ting-Hung Wang, Chia-Jung Lee, Liang-Pin Tai
  • Publication number: 20100090751
    Abstract: An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower level silicide layer and the upper level conductive layer. The tungsten contact and a neck portion of the silicide layer are the programmable portion of the electrical fuse. High post-programming resistance is achieved by a first programming phase that depletes silicide in the silicide layer, followed by a second programming phase that depletes tungsten in the tungsten contact.
    Type: Application
    Filed: December 14, 2009
    Publication date: April 15, 2010
    Inventors: Hsin-Li Cheng, Chia-Jung Lee, Chin-Shan Hou, Wei-Ming Chen
  • Publication number: 20100033145
    Abstract: A DCR sense scheme is provided to sense the inductor current of a COT power converter. The DCR sense is implemented by using the direct current resistance of the output inductor of the COT power converter, and thus eliminates the ESR limitations on the type of output capacitors for stability concern. A quick response mechanism is further incorporated in the COT power converter to speed up the transient response of the COT power converter.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Inventors: Cheng-De Tseng, Chia-Jung Lee
  • Publication number: 20100033154
    Abstract: A multi-phase power converter with constant on-time control includes a plurality of channels to convert an input voltage into an output voltage, and each of the channels is driven by a control signal. When all channel currents of the channels are balanced, each of the control signals remains a constant on-time. When the channel currents are imbalanced, the on-times of the control signals are modulated according to the difference between each channel current and a target value for current balance between the channels.
    Type: Application
    Filed: August 4, 2009
    Publication date: February 11, 2010
    Inventors: Chung-Sheng Cheng, Chung-Shu Li, Chia-Jung Lee, Jian-Rong Huang
  • Patent number: 7642176
    Abstract: An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower level silicide layer and the upper level conductive layer. The tungsten contact and a neck portion of the silicide layer are the programmable portion of the electrical fuse. High post-programming resistance is achieved by a first programming phase that depletes silicide in the silicide layer, followed by a second programming phase that depletes tungsten in the tungsten contact.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: January 5, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Li Cheng, Chia-Jung Lee, Chin-Shan Hou, Wei-Ming Chen
  • Publication number: 20090322296
    Abstract: A multi-chip module (MCM) for power supply circuitry integrates a controller, a driver and two power MOSFETs in a single chip to shorten the signal path between the controller and the driver. When applied to a voltage regulator, the MCM shortens the feedback paths between the current sensors and the controller, so as to reduce the loss of and interference with the feedback signals, thereby improving the efficiency of the voltage regulator and simplifying the PCB traces routing.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 31, 2009
    Inventors: Chung-Shu Li, Chia-Jung Lee
  • Publication number: 20090261450
    Abstract: An electrical fuse and a process of programming the same are presented. An electrical fuse comprises a lower level silicide layer on a non-doped or lightly-doped polysilicon layer, an upper level conductive layer, and a tungsten contact coupled between the lower level silicide layer and the upper level conductive layer. The tungsten contact and a neck portion of the silicide layer are the programmable portion of the electrical fuse. High post-programming resistance is achieved by a first programming phase that depletes silicide in the silicide layer, followed by a second programming phase that depletes tungsten in the tungsten contact.
    Type: Application
    Filed: April 21, 2008
    Publication date: October 22, 2009
    Inventors: Hsin-Li Cheng, Chia-Jung Lee, Chin-Shan Hou, Wei-Ming Chen
  • Publication number: 20090230932
    Abstract: A per-phase quick response generation circuit generates a quick response signal to determine a quick response pulse to be inserted into a pulse width modulation signal of the corresponding phase. The quick response pulse will force the upper power switch of the corresponding phase on to increase the current supply ability during load transition. A multi-phase voltage regulator with the quick response generation circuit can have different quick response pulse widths for the interleaved phases, so as to decrease the current imbalance period of the voltage regulator after load transition.
    Type: Application
    Filed: March 6, 2009
    Publication date: September 17, 2009
    Inventors: Ting-Hung Wang, Chia-Jung Lee, Liang-Pin Tai
  • Patent number: 7446295
    Abstract: An image sensor module including a substrate, an image signal processor, a supporting board, an image sensor chip and a cover is provided. A concavity is located on a surface of the substrate. The image signal processor is disposed in the concavity e, and is electrically connected to the substrate. The supporting board is disposed on the surface of the substrate and covers the concavity. The image sensor chip is disposed on the supporting board and electrically connected to the substrate. The cover is disposed on the substrate, and covers the image sensor chip.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: November 4, 2008
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Jian-Cheng Chen, Ming-Hsiang Cheng, Chia-Jung Lee
  • Publication number: 20080048097
    Abstract: An image sensor module including a substrate, an image signal processor, a supporting board, an image sensor chip and a cover is provided. A concave is located on a surface of the substrate. The image signal processor is disposed in the concave, and is electrically connected to the substrate. The supporting board is disposed on the surface of the substrate and covers the concave. The image sensor chip is disposed on the supporting board and electrically connected to the substrate. The cover is disposed on the substrate, and covers the image sensor chip.
    Type: Application
    Filed: September 19, 2006
    Publication date: February 28, 2008
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jian-Cheng Chen, Ming-Hsiang Cheng, Chia-Jung Lee