Patents by Inventor Chia-Kai Chen

Chia-Kai Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973039
    Abstract: A semiconductor device package includes a semiconductor die, a first conductive element, a second conductive element, a metal layer, and a first redistribution layer (RDL). The semiconductor die includes a first surface and a second surface opposite to the first surface. The first conductive element is disposed on the second surface of the semiconductor die. The second conductive element is disposed next to the semiconductor die. The metal layer is disposed on the second conductive element and electrically connected to the second conductive element. The first RDL is disposed on the metal layer and electrically connected to the metal layer.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: April 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia-Hao Sung, Hsuan-Yu Chen, Yu-Kai Lin
  • Publication number: 20240097662
    Abstract: An integrated circuit includes an upper threshold circuit configured to set a logic level of a first enabling signal, a lower threshold circuit configured to set a logic level of a second enabling signal, and a control circuit configured to change an output voltage signal in response to a condition that the logic level of the first enabling signal and the logic level of the second enabling signal are changed consecutively. In the control circuit, a first switch is electrically connected to a second switch at a buffer output node. The control circuit includes a regenerative circuit configured to maintain the output voltage signal at the buffer output node while each of the first switch and the second switch is at a disconnected state.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Kai TSAI, Chia-Hui CHEN, Chia-Jung CHANG
  • Publication number: 20240096677
    Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Chia-Cheng Chen, Chih-Kai Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20230369382
    Abstract: A stretchable pixel array substrate includes a base, pixel structures and a gate driving circuit electrically connected to the pixel structures. The base has an active area and a peripheral area outside the active area. The peripheral area has openings to define first islands, second islands and first bridges of the peripheral area. An area of each of the first islands is greater than an area of each of the second islands. At least a part of the first bridges is connected between the first islands and the second islands. The pixel structures are disposed on the active area of the base. The gate driving circuit includes first parts disposed on the first islands and second parts disposed on the second islands and electrically connected to the first parts.
    Type: Application
    Filed: August 5, 2022
    Publication date: November 16, 2023
    Applicant: AUO Corporation
    Inventors: Kent-Yi Lee, Wen-Ting Wang, Chia-Kai Chen, Chih-Ling Hsueh
  • Publication number: 20230244319
    Abstract: A method for identifying an object, an optical sensing apparatus and a system are provided. A controller of the system drives multiple light sources of the optical sensing apparatus to emit the multiple light beams with different beam angles, controls a light sensor to sense the lights reflected by the object, and performs the method for identifying the object. In the method, the light sensor is used to sense a first light emitted by a first light source with a first beam angle reflected by the object, and sense an intensity of the reflected first light. The light sensor is also used to sense a second light emitted by a second light source with a second beam angle reflected by the object and sense another intensity of the reflected second light. Therefore, the object can be identified by integrating information of the intensities obtained by the light sensor.
    Type: Application
    Filed: April 10, 2023
    Publication date: August 3, 2023
    Inventors: TIEN-CHUNG YANG, CHIA-KAI CHEN, EN-FENG HSU, CHEN-LUNG LIU
  • Publication number: 20230175836
    Abstract: A distance determining system comprising: a light source, configured to emit light; a first light sensing region, away from the light source for a first distance, comprising at least one first light sensing device; a second light sensing region, away from the light source for a second distance larger than the first distance, comprising at least one second light sensing device; and a processing circuit, configured to compute distance information of an object which reflects the light to the first light sensing region and the second light sensing region, according to a first relation between a first light intensity sensed by the first light sensing region and a second light intensity sensed by the second light sensing region.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Applicant: PixArt Imaging Inc.
    Inventors: En-Feng Hsu, Chia-Kai Chen
  • Patent number: 11662828
    Abstract: A method for identifying an object, an optical sensing apparatus and a system are provided. A controller of the system drives multiple light sources of the optical sensing apparatus to emit the multiple light beams with different beam angles, controls a light sensor to sense the lights reflected by the object, and performs the method for identifying the object. In the method, the light sensor is used to sense a first light emitted by a first light source with a first beam angle reflected by the object, and sense an intensity of the reflected first light. The light sensor is also used to sense a second light emitted by a second light source with a second beam angle reflected by the object and sense another intensity of the reflected second light. Therefore, the object can be identified by integrating information of the intensities obtained by the light sensor.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: May 30, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Tien-Chung Yang, Chia-Kai Chen, En-Feng Hsu, Chen-Lung Liu
  • Publication number: 20220382378
    Abstract: A method for identifying an object, an optical sensing apparatus and a system are provided. A controller of the system drives multiple light sources of the optical sensing apparatus to emit the multiple light beams with different beam angles, controls a light sensor to sense the lights reflected by the object, and performs the method for identifying the object. In the method, the light sensor is used to sense a first light emitted by a first light source with a first beam angle reflected by the object, and sense an intensity of the reflected first light. The light sensor is also used to sense a second light emitted by a second light source with a second beam angle reflected by the object and sense another intensity of the reflected second light. Therefore, the object can be identified by integrating information of the intensities obtained by the light sensor.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 1, 2022
    Inventors: TIEN-CHUNG YANG, CHIA-KAI CHEN, EN-FENG HSU, CHEN-LUNG LIU
  • Patent number: 11264447
    Abstract: A touch display device includes a first substrate and a second substrate. The first substrate has a signal wire and a display unit which are electrically connected to each other. The second substrate has a conductive circuit and a touch unit which are disposed on one side of the second substrate facing the first substrate. The second substrate includes a touch area and a bending area, the touch unit is disposed in the touch area, and the touch area is stacked on the display unit, and the conductive circuit is disposed in the bending area and is electrically connected to the signal wire. The bending area extends from an edge of the first substrate and is bent to one side of the first substrate facing away from the second substrate.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: March 1, 2022
    Assignee: Au Optronics Corporation
    Inventors: Kung-Cheng Lin, Pin-Miao Liu, Ting-Yu Hsu, Chia-Kai Chen
  • Patent number: 11069866
    Abstract: An active device substrate including a flexible substrate, an inorganic insulation layer, an organic insulation pattern, a conductive device and a peripheral wiring is provided. The flexible substrate has an active region, a peripheral region outside the active region and a bending region connected between the active region and the peripheral region. The inorganic insulation layer is disposed on the flexible substrate and has a groove disposed in the bending region. The organic insulation pattern is disposed in the groove of the inorganic insulation layer. The peripheral wiring is extended from the active region to the conductive device in the peripheral region. The peripheral wiring is disposed on the organic insulation pattern, and the organic insulation pattern is located between the peripheral wiring and the flexible substrate.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: July 20, 2021
    Assignee: Au Optronics Corporation
    Inventors: Pei-Yun Wang, Chia-Kai Chen
  • Publication number: 20210028268
    Abstract: A touch display device includes a first substrate and a second substrate. The first substrate has a signal wire and a display unit which are electrically connected to each other. The second substrate has a conductive circuit and a touch unit which are disposed on one side of the second substrate facing the first substrate. The second substrate includes a touch area and a bending area, the touch unit is disposed in the touch area, and the touch area is stacked on the display unit, and the conductive circuit is disposed in the bending area and is electrically connected to the signal wire. The bending area extends from an edge of the first substrate and is bent to one side of the first substrate facing away from the second substrate.
    Type: Application
    Filed: June 9, 2020
    Publication date: January 28, 2021
    Applicant: Au Optronics Corporation
    Inventors: Kung-Cheng Lin, Pin-Miao Liu, Ting-Yu Hsu, Chia-Kai Chen
  • Publication number: 20200013970
    Abstract: An active device substrate including a flexible substrate, an inorganic insulation layer, an organic insulation pattern, a conductive device and a peripheral wiring is provided. The flexible substrate has an active region, a peripheral region outside the active region and a bending region connected between the active region and the peripheral region. The inorganic insulation layer is disposed on the flexible substrate and has a groove disposed in the bending region. The organic insulation pattern is disposed in the groove of the inorganic insulation layer. The peripheral wiring is extended from the active region to the conductive device in the peripheral region. The peripheral wiring is disposed on the organic insulation pattern, and the organic insulation pattern is located between the peripheral wiring and the flexible substrate.
    Type: Application
    Filed: June 29, 2019
    Publication date: January 9, 2020
    Applicant: Au Optronics Corporation
    Inventors: Pei-Yun Wang, Chia-Kai Chen
  • Patent number: 10263019
    Abstract: A flexible panel includes a substrate, a first insulating layer, a second insulating layer, a sacrificial layer, and a metal wiring layer. The substrate has an active area, a peripheral area, and an intermediate area. The first insulating layer is in the three areas of the substrate, and the first insulating layer in the intermediate area has a first pattern. The second insulating layer is on the first insulating layer. The second insulating layer in the intermediate area has a first opening extending along a first direction, so that the second insulating layer does not cover the first pattern of the first insulating layer. The sacrificial layer is between the first insulating layer and the second insulating layer in the intermediate area, and does not cover the first pattern of the first insulating layer. The metal wiring layer extends between the active area and the peripheral area.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: April 16, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Pei-Yun Wang, Cheng-Wei Jiang, Ting-Yu Hsu, Ya-Qin Huang, Hsiang-Yun Hsiao, Chia-Kai Chen
  • Publication number: 20180308877
    Abstract: A flexible panel includes a substrate, a first insulating layer, a second insulating layer, a sacrificial layer, and a metal wiring layer. The substrate has an active area, a peripheral area, and an intermediate area. The first insulating layer is in the three areas of the substrate, and the first insulating layer in the intermediate area has a first pattern. The second insulating layer is on the first insulating layer. The second insulating layer in the intermediate area has a first opening extending along a first direction, so that the second insulating layer does not cover the first pattern of the first insulating layer. The sacrificial layer is between the first insulating layer and the second insulating layer in the intermediate area, and does not cover the first pattern of the first insulating layer. The metal wiring layer extends between the active area and the peripheral area.
    Type: Application
    Filed: April 19, 2018
    Publication date: October 25, 2018
    Inventors: Pei-Yun WANG, Cheng-Wei JIANG, Ting-Yu HSU, Ya-Qin HUANG, Hsiang-Yun HSIAO, Chia-Kai CHEN
  • Patent number: 9891501
    Abstract: A method of fabricating a polycrystalline silicon thin film transistor device includes the following steps. A substrate is provided, and a buffer layer having dopants is formed on the substrate. An amorphous silicon layer is formed on the buffer layer having the dopants. A thermal process is performed to convert the amorphous silicon layer into a polycrystalline silicon layer by means of polycrystalization, and to simultaneously out-diffuse a portion of the dopants in the buffer layer into the polycrystalline silicon layer for adjusting a threshold voltage. The polycrystalline silicon layer is patterned to form an active layer. A gate insulating layer is formed on the active layer. A gate electrode is formed on the gate insulating layer. A source doped region and a drain doped region are formed in the active layer.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: February 13, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Yun Hsiao, Chia-Kai Chen, Shih-Liang Lin, Ting-Yu Hsu, Pei-Yun Wang, Ya-Qin Huang, Cheng-Wei Jiang
  • Publication number: 20170084457
    Abstract: A method of fabricating a polycrystalline silicon thin film transistor device includes the following steps. A substrate is provided, and a buffer layer having dopants is formed on the substrate. An amorphous silicon layer is formed on the buffer layer having the dopants. A thermal process is performed to convert the amorphous silicon layer into a polycrystalline silicon layer by means of polycrystalization, and to simultaneously out-diffuse a portion of the dopants in the buffer layer into the polycrystalline silicon layer for adjusting a threshold voltage. The polycrystalline silicon layer is patterned to form an active layer. A gate insulating layer is formed on the active layer. A gate electrode is formed on the gate insulating layer. A source doped region and a drain doped region are formed in the active layer.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 23, 2017
    Inventors: Hsiang-Yun HSIAO, Chia-Kai CHEN, Shih-Liang LIN, Ting-Yu HSU, Pei-Yun WANG, Ya-Qin HUANG, Cheng-Wei JIANG
  • Patent number: 8748896
    Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: June 10, 2014
    Assignee: Au Optronics Corporation
    Inventors: An-Thung Cho, Wan-Yi Liu, Chia-Kai Chen, Wu-Hsiung Lin, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20140034951
    Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.
    Type: Application
    Filed: October 8, 2013
    Publication date: February 6, 2014
    Applicant: Au Optronics Corporation
    Inventors: An-Thung Cho, Wan-Yi Liu, Chia-Kai Chen, Wu-Hsiung Lin, Chun-Hsiun Chen, Wei-Ming Huang
  • Patent number: 8586425
    Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: November 19, 2013
    Assignee: Au Optronics Corporation
    Inventors: An-Thung Cho, Wan-Yi Liu, Chia-Kai Chen, Wu-Hsiung Lin, Chun-Hsiun Chen, Wei-Ming Huang
  • Patent number: 8093648
    Abstract: A method for manufacturing a non-volatile memory and a structure thereof are provided. The manufacturing method comprises the following steps. Firstly, a substrate is provided. Next, a semiconductor layer is formed on the substrate. Then, a Si-rich dielectric layer is formed on the semiconductor layer. After that, a plurality of silicon nanocrystals is formed in the Si-rich dielectric layer by a laser annealing process to form a charge-storing dielectric layer. Last, a gate electrode is formed on the charge-storing dielectric layer.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: January 10, 2012
    Assignee: Au Optronics Corp.
    Inventors: An-Thung Cho, Chia-Tien Peng, Chih-Wei Chao, Wan-Yi Liu, Chia-Kai Chen, Chun-Hsiun Chen, Wei-Ming Huang