Patents by Inventor Chia-Ku Tsai

Chia-Ku Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210066286
    Abstract: The electrostatic discharge (ESD) protection apparatus includes a first well, a second well, a first doping region, and a second doping region. The first well is disposed in a substrate having a first conductivity type, wherein the first well has a second conductivity type and the substrate is electrically connected to a first pad. The second well is disposed in the first well, wherein the second well has the first conductivity type. The first doping region is disposed in the second well, wherein the first doping region has the second conductivity type, and the first doping region is electrically connected to a second pad. The second doping region is disposed in the second well, wherein the second doping region has the first conductivity type.
    Type: Application
    Filed: January 17, 2020
    Publication date: March 4, 2021
    Applicant: Faraday Technology Corp.
    Inventors: Chia-Ku Tsai, Tsung-Hsiao Lin
  • Publication number: 20200035670
    Abstract: A electrostatic discharge (ESD) protection apparatus for an integrated circuit (IC) is provided. A first electrostatic current rail and a second electrostatic current rail of the ESD protection apparatus do not directly connected to any bonding pad of the IC. The ESD protection apparatus further includes a clamp circuit and four ESD protection circuits. The clamp circuit is coupled between the first electrostatic current rail and the second electrostatic current rail. A first ESD protection circuit is coupled between the first electrostatic current rail and a signal pad of the IC. A second ESD protection circuit is coupled between the signal pad and the second electrostatic current rail. A third ESD protection circuit is coupled between a first power rail and the second electrostatic current rail. A fourth ESD protection circuit is coupled between the second electrostatic current rail and a second power rail.
    Type: Application
    Filed: October 8, 2018
    Publication date: January 30, 2020
    Applicant: Faraday Technology Corp.
    Inventors: Chia-Ku Tsai, Chi-Sheng Liao, Jeng-Huang Wu
  • Patent number: 10505364
    Abstract: An electrostatic discharge (ESD) protection apparatus includes: an ESD circuit, arranged to perform ESD protection, wherein the ESD circuit includes a first Field Effect Transistor (FET) arranged to release ESD energy; a detection circuit, arranged to perform detection to control the ESD protection apparatus to selectively operate in one of a normal mode and a discharge mode; and a logic circuit, arranged to withstand any oscillation due to resistance-inductance-capacitance (RLC) characteristics of the detection circuit. In the detection circuit, different subsets of a plurality of resistors are respectively combined with a portion of a first serial connection circuit, an entirety of the first serial connection circuit, and a second FET to form different serial connection circuits, to configure the second FET to approach a state of being completely turned off in the normal mode.
    Type: Grant
    Filed: September 3, 2017
    Date of Patent: December 10, 2019
    Assignee: Faraday Technology Corp.
    Inventor: Chia-Ku Tsai
  • Publication number: 20180351351
    Abstract: An electrostatic discharge (ESD) protection apparatus includes: an ESD circuit, arranged to perform ESD protection, wherein the ESD circuit includes a first Field Effect Transistor (FET) arranged to release ESD energy; a detection circuit, arranged to perform detection to control the ESD protection apparatus to selectively operate in one of a normal mode and a discharge mode; and a logic circuit, arranged to withstand any oscillation due to resistance-inductance-capacitance (RLC) characteristics of the detection circuit. In the detection circuit, different subsets of a plurality of resistors are respectively combined with a portion of a first serial connection circuit, an entirety of the first serial connection circuit, and a second FET to form different serial connection circuits, to configure the second FET to approach a state of being completely turned off in the normal mode.
    Type: Application
    Filed: September 3, 2017
    Publication date: December 6, 2018
    Inventor: Chia-Ku Tsai
  • Publication number: 20150109705
    Abstract: A method for performing electrostatic discharge (ESD) protection and an associated apparatus are provided, where the method is applied to an electronic device, and the method includes: utilizing a trigger source formed with a plurality of Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) to trigger a discharge operation, where the gate and the drain of any MOSFET within the plurality of MOSFETs are electrically connected to each other, causing the MOSFET to be utilized as a two-terminal component, and the MOSFETs that are respectively utilized as two-terminal components are connected in series; and utilizing an ESD apparatus to perform the discharge operation in response to the trigger of the trigger source, in order to perform ESD protection on the apparatus.
    Type: Application
    Filed: January 6, 2014
    Publication date: April 23, 2015
    Inventors: Tzu-Heng Chang, Fu-Yi Tsai, Chia-Ku Tsai
  • Patent number: 8749931
    Abstract: An electrostatic discharge (ESD) protection apparatus includes at least one first transistor and at least one second transistor. The first transistor includes a control terminal, a first terminal, a second terminal, and a bulk. The control terminal and the second terminal of the first transistor are coupled to each other. The first terminal of the first transistor is coupled to one of a pad and a power rail line. Likewise, the second transistor also includes a control terminal, a first terminal, and a second terminal. The first terminal of the second transistor is coupled to the bulk of the first transistor, the bulk of the second transistor is coupled to the second terminal of the first transistor, and the second terminal of the second transistor is coupled to the other of the pad and the power rail line.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: June 10, 2014
    Assignee: Faraday Technology Corp.
    Inventors: Fu-Yi Tsai, Chia-Ku Tsai, Yan-Hua Peng, Ming-Dou Ker
  • Patent number: 8743517
    Abstract: ESD protection circuit including a resistor and at least one protection transistor; the resistor coupled between an I/O signal node and an internal node of internal circuit, the protection transistors serially coupled between the internal node and a voltage node with each protection transistor comprising a gate and a drain which is coupled to the gate.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: June 3, 2014
    Assignee: Faraday Technology Corp.
    Inventors: Fu-Yi Tsai, Yan-Hua Peng, Chia-Ku Tsai, Ming-Dou Ker
  • Patent number: 8730634
    Abstract: Electrostatic discharge (ESD) protection circuit including a first silicon controlled rectifier (SCR) and a trigger circuit; the trigger circuit including a first MOS transistor and a second transistor, triggering the first SCR and providing a second SCR shunt with the first SCR during ESD.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: May 20, 2014
    Assignee: Faraday Technology Corp.
    Inventors: Chia-Ku Tsai, Fu-Yi Tsai, Yan-Hua Peng
  • Publication number: 20130088801
    Abstract: An electrostatic discharge (ESD) protection apparatus includes at least one first transistor and at least one second transistor. The first transistor includes a control terminal, a first terminal, a second terminal, and a bulk. The control terminal and the second terminal of the first transistor are coupled to each other. The first terminal of the first transistor is coupled to one of a pad and a power rail line. Likewise, the second transistor also includes a control terminal, a first terminal, and a second terminal. The first terminal of the second transistor is coupled to the bulk of the first transistor, the bulk of the second transistor is coupled to the second terminal of the first transistor, and the second terminal of the second transistor is coupled to the other of the pad and the power rail line.
    Type: Application
    Filed: April 25, 2012
    Publication date: April 11, 2013
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Fu-Yi Tsai, Chia-Ku Tsai, Yan-Hua Peng, Ming-Dou Ker
  • Publication number: 20130044397
    Abstract: ESD protection circuit including a resistor and at least one protection transistor; the resistor coupled between an I/O signal node and an internal node of internal circuit, the protection transistors serially coupled between the internal node and a voltage node with each protection transistor comprising a gate and a drain which is coupled to the gate.
    Type: Application
    Filed: June 21, 2012
    Publication date: February 21, 2013
    Applicant: FARADAY TECHNOLOGY CORPORATION
    Inventors: Fu-Yi Tsai, Yan-Hua Peng, Chia-Ku Tsai, Ming-Dou Ker
  • Publication number: 20120275073
    Abstract: Electrostatic discharge (ESD) protection circuit including a first silicon controlled rectifier (SCR) and a trigger circuit; the trigger circuit including a first MOS transistor and a second transistor, triggering the first SCR and providing a second SCR shunt with the first SCR during ESD.
    Type: Application
    Filed: April 2, 2012
    Publication date: November 1, 2012
    Applicant: FARADAY TECHNOLOGY CORPORATION
    Inventors: Chia-Ku Tsai, Fu-Yi Tsai, Yan-Hua Peng
  • Patent number: 7538998
    Abstract: An electrostatic discharge protection circuit comprises a pad, a first transistor, a second transistor, and a diode. Wherein, the first transistor comprises the gate, a first source-drain, and a second source-drain. The first source-drain of the first transistor is electrically coupled to the pad, and the second source-drain of the first transistor is electrically coupled to a first power line. The first source-drain of the second transistor is electrically coupled to the gate of the first transistor, the second source-drain of the second transistor is electrically coupled to the first power line, and the gate of the second transistor is electrically coupled to a second power line. The diode includes a first terminal coupled to the gate of the first transistor, and a second terminal coupled to the pad. In addition, the diode and the first transistor together form a silicon controlled rectifier (SCR).
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: May 26, 2009
    Assignee: Winbond Electronics Corp.
    Inventors: Chia-Ku Tsai, Chung-Ti Hsu
  • Publication number: 20070096213
    Abstract: An electrostatic discharge protection circuit comprises a pad, a first transistor, a second transistor, and a diode. Wherein, the first transistor comprises the gate, a first source-drain, and a second source-drain. The first source-drain of the first transistor is electrically coupled to the pad, and the second source-drain of the first transistor is electrically coupled to a first power line. The first source-drain of the second transistor is electrically coupled to the gate of the first transistor, the second source-drain of the second transistor is electrically coupled to the first power line, and the gate of the second transistor is electrically coupled to a second power line. The diode includes a first terminal coupled to the gate of the first transistor, and a second terminal coupled to the pad. In addition, the diode and the first transistor together form a silicon controlled rectifier (SCR).
    Type: Application
    Filed: June 16, 2006
    Publication date: May 3, 2007
    Inventors: Chia-Ku Tsai, Chung-Ti Hsu