Abstract: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

Abstract: A power converter includes a first load terminal used to supply a current to a load and a second load terminal used to return a feedback voltage based on the current. A calibration circuit supplies a calibrated voltage processed from the feedback voltage, and a hysteretic comparator controls a current level of the current based on a difference between the feedback voltage and the calibrated voltage.

Abstract: A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.

Abstract: A power converter includes a power supply node, an output node, a plurality of driving units, a feedback unit, a comparator, and a control unit. Two or more of the plurality of driving units are configured to be activated or to be deactivated responsive to a plurality of control signals. The feedback unit is configured to provide a feedback voltage based on an output voltage at the output node. The comparator is configured to provide an indication signal. The control unit is configured to generate the plurality of control signals based on the indication signal. The control unit is configured to, through the plurality of control signals, increase or decrease a number of activated driving units of the plurality of driving units by one or more predetermined increments at a time.

Abstract: In a thermal sensor. a capacitor voltage of a capacitor is compared with a reference voltage, and an output voltage is generated based on the comparison. The output voltage has a pulse density indicative of a temperature detected by the thermal sensor. The capacitor is charged or discharged using at least one of a first current signal or a second current signal based on a logic level of the output voltage. The first current signal is a temperature-independent signal, and the second current signal is a temperature-dependent signal dependent on the temperature detected by the thermal sensor. In some embodiments, a clock rate of a clock signal is varied in accordance with the detected temperature to control a timing operation for supplying the first current signal to the capacitor and/or the reference voltage is varied in accordance with the detected temperature.

Abstract: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

Abstract: A sensor for sensing a parameter includes a capacitor, a switch and a comparator. The capacitor is configured to be charged or discharged by at least one of a first current signal or a second current signal. The switch is configured to selectively connect or disconnect the first current signal and the capacitor in response to a feedback signal. The comparator is coupled with the capacitor and configured to output an output voltage based on a comparison of a capacitor voltage of the capacitor to a reference voltage. The first current signal is independent of the parameter, and the second current signal is dependent on the parameter. The output voltage defines the feedback signal and is indicative of a value of the parameter detected by the sensor.

Abstract: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

Abstract: In a thermal sensor. a capacitor voltage of a capacitor is compared with a reference voltage, and an output voltage is generated based on the comparison. The output voltage has a pulse density indicative of a temperature detected by the thermal sensor. The capacitor is charged or discharged using at least one of a first current signal or a second current signal based on a logic level of the output voltage. The first current signal is a temperature-independent signal, and the second current signal is a temperature-dependent signal dependent on the temperature detected by the thermal sensor. In some embodiments, a clock rate of a clock signal is varied in accordance with the detected temperature to control a timing operation for supplying the first current signal to the capacitor and/or the reference voltage is varied in accordance with the detected temperature.

Abstract: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

Abstract: An image processing apparatus is for rendering a three-dimensional (3D) effect by transforming a first quadrilateral image to a second quadrilateral image. The apparatus includes a target image determining unit, a block determining unit and a graphic unit. The target image determining unit generates an outline associated with the second quadrilateral image according to the first quadrilateral image and the 3D effect. The block determining unit divides an area within the outline into a plurality of second blocks and correspondingly determines a plurality of first blocks from the first quadrilateral image. The graphic unit scales image data of the first blocks to respectively generate image data of the second blocks to obtain the second quadrilateral image.

Abstract: A hysteretic digital filter includes a first multi-bit flip-flop having an input for receiving a series of multi-bit sigma-delta ADC codes, a clock input for receiving a clock signal and an output; a second multi-bit flip-flop having an input coupled to the output of the first multi-bit flip-flop, an output for providing an output code of the digital filter, and an input for receiving a latch control signal, the second multi-bit flip-flop latching its input to its output under control of the latch control signal; and a control circuit. The control circuit is configured to selectively provide the latch control signal to trigger latching by the second multi-bit flip-flop dependent on a running comparison of the output code of the digital filter and the value of individual ones of the multi-bit sigma-delta ADC codes from the series of multi-bit sigma-delta ADC codes.

Abstract: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

Abstract: A hysteretic digital filter includes a first multi-bit flip-flop having an input for receiving a series of multi-bit sigma-delta ADC codes, a clock input for receiving a clock signal and an output; a second multi-bit flip-flop having an input coupled to the output of the first multi-bit flip-flop, an output for providing an output code of the digital filter, and an input for receiving a latch control signal, the second multi-bit flip-flop latching its input to its output under control of the latch control signal; and a control circuit. The control circuit is configured to selectively provide the latch control signal to trigger latching by the second multi-bit flip-flop dependent on a running comparison of the output code of the digital filter and the value of individual ones of the multi-bit sigma-delta ADC codes from the series of multi-bit sigma-delta ADC codes.

Abstract: A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.

Abstract: A LED driving circuit includes a transformer, a rectifying filtering circuit, a PWM IC, a constant current circuit, and a feedback circuit. The transformer has a primary side and a secondary side. The rectifying filtering circuit is coupled to the secondary side and has a first output terminal. The PWM IC is coupled to the primary side. The constant current circuit has a second output terminal. A LED load is adapted to couple between the first output terminal and the second output terminal. The feedback circuit has a first input terminal coupled to the first output terminal to receive a first voltage and a second input terminal coupled to the constant current circuit to receive a second voltage. The second voltage varies with a conduction status of the LED load. The feedback circuit is adapted to control the PWM IC according to the received first and second voltages.

Abstract: A LED driving circuit includes a transformer, a rectifying filtering circuit, a PWM IC, a constant current circuit, and a feedback circuit. The transformer has a primary side and a secondary side. The rectifying filtering circuit is coupled to the secondary side and has a first output terminal. The PWM IC is coupled to the primary side. The constant current circuit has a second output terminal. A LED load is adapted to couple between the first output terminal and the second output terminal. The feedback circuit has a first input terminal coupled to the first output terminal to receive a first voltage and a second input terminal coupled to the constant current circuit to receive a second voltage. The second voltage varies with a conduction status of the LED load. The feedback circuit is adapted to control the PWM IC according to the received first and second voltages.

Abstract: An image processing apparatus is for rendering a three-dimensional (3D) effect by transforming a first quadrilateral image to a second quadrilateral image. The apparatus includes a target image determining unit, a block determining unit and a graphic unit. The target image determining unit generates an outline associated with the second quadrilateral image according to the first quadrilateral image and the 3D effect. The block determining unit divides an area within the outline into a plurality of second blocks and correspondingly determines a plurality of first blocks from the first quadrilateral image. The graphic unit scales image data of the first blocks to respectively generate image data of the second blocks to obtain the second quadrilateral image.

Abstract: This invention relates to thiophene compounds of formula (I) shown below: Each variable in formula (I) is defined in the specification. These compounds can be used to treat cannabinoid-receptor mediated disorders.

Abstract: This invention relates to selenophene compounds of formula (I) shown below. Each variable in formula (I) is defined in the specification. These compounds can be used to treat cannabinoid-receptor mediated disorders.