Abstract: A semiconductor device structure and a method for forming the same are provided. The semiconductor device structure includes a gate electrode layer formed over a semiconductor substrate and capped with a conductive capping layer. The semiconductor device structure also includes an insulating capping stack having a lower surface that faces and is spaced apart from an upper surface of the conductive capping layer. In addition, the semiconductor device structure includes gate spacers formed over the semiconductor substrate and covering opposing sidewalls of the gate electrode layer, the conductive capping layer, and the insulating capping stack.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: A semiconductor device structure and a method for forming the same are provided. The semiconductor device structure includes a gate electrode layer formed over a semiconductor substrate and capped with a conductive capping layer. The semiconductor device structure also includes an insulating capping stack having a lower surface that faces and is spaced apart from an upper surface of the conductive capping layer. In addition, the semiconductor device structure includes gate spacers formed over the semiconductor substrate and covering opposing sidewalls of the gate electrode layer, the conductive capping layer, and the insulating capping stack.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a pair of source/drain features formed in a semiconductor substrate and a gate stack formed over a portion of the semiconductor substrate that is between the pair of source/drain features. The semiconductor device structure also includes gate spacers extend along opposing sidewalls of the gate stack and protrude above an upper surface of the gate stack. Additionally, the semiconductor device structure includes a first capping layer formed over the gate stack and spaced apart from the upper surface of the gate stack by a gap. Opposing sidewalls of the first capping layer are covered by portions of the gate spacers that protrude above the upper surface of the gate stack.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a fin spacer alongside a fin structure, a source/drain structure over the fin structure, and a salicide layer along a surface of the source/drain structure. A bottom portion of the salicide layer is in contact with the fin spacer. The semiconductor device structure also includes a capping layer over the salicide layer. A portion of the capping layer directly below the bottom portion of the salicide layer is in contact with the fin spacer. The semiconductor device structure also includes a dielectric layer over the capping layer. The dielectric layer is made of a different material than the capping layer.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a pair of source/drain features formed in a semiconductor substrate and a gate stack formed over a portion of the semiconductor substrate that is between the pair of source/drain features. The semiconductor device structure also includes gate spacers extend along opposing sidewalls of the gate stack and protrude above an upper surface of the gate stack. Additionally, the semiconductor device structure includes a first capping layer formed over the gate stack and spaced apart from the upper surface of the gate stack by a gap. Opposing sidewalls of the first capping layer are covered by portions of the gate spacers that protrude above the upper surface of the gate stack.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain contact structure formed over a semiconductor substrate, and a first gate stack formed over the semiconductor substrate and adjacent to the source/drain contact structure. The semiconductor device structure also includes an insulating cap structure formed over and separated from an upper surface of the first gate stack. In addition, the semiconductor device structure includes first gate spacers formed over opposing sidewalls of the first gate stack to separate the first gate stack from the source/drain contact structure. The first gate spacers extend over opposing sidewalls of the insulating cap structure, so as to form an air gap surrounded by the first gate spacers, the first gate stack, and the insulating cap structure.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first gate structure and a second gate structure formed over a semiconductor substrate. The semiconductor device structure also includes a first insulating cap structure formed between and adjacent to the first gate structure and the second gate structure. The first insulating cap structure is separated from the semiconductor substrate by a first air gap. The first air gap includes a first portion extending into the first insulating cap structure and a second portion extended from the bottom of the first portion toward the semiconductor substrate. The first portion has a width that is less than the width of the second portion.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a fin over the base. The semiconductor device structure includes a gate stack wrapping around a first upper portion of the fin. The semiconductor device structure includes a first stressor and a second stressor respectively over opposite first sides of the fin. The semiconductor device structure includes a spacer structure between the gate stack and the first stressor. The semiconductor device structure includes a first spacer layer covering a sidewall of the gate stack, the spacer structure, and the first stressor. The semiconductor device structure includes a dielectric layer over the first spacer layer. The semiconductor device structure includes an etch stop layer between the first spacer layer and the dielectric layer. The semiconductor device structure includes a seal structure between the second upper portion and the third upper portion.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first gate structure and a second gate structure formed over a semiconductor substrate. The semiconductor device structure also includes a first insulating cap structure formed between and adjacent to the first gate structure and the second gate structure. The first insulating cap structure is separated from the semiconductor substrate by a first air gap. The first air gap includes a first portion extending into the first insulating cap structure and a second portion extended from the bottom of the first portion toward the semiconductor substrate. The first portion has a width that is less than the width of the second portion.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base and a fin over the base. The semiconductor device structure includes a gate stack wrapping around a first upper portion of the fin. The semiconductor device structure includes a first stressor and a second stressor respectively over opposite first sides of the fin. The semiconductor device structure includes a spacer structure between the gate stack and the first stressor. The semiconductor device structure includes a first spacer layer covering a sidewall of the gate stack, the spacer structure, and the first stressor. The semiconductor device structure includes a dielectric layer over the first spacer layer. The semiconductor device structure includes an etch stop layer between the first spacer layer and the dielectric layer. The semiconductor device structure includes a seal structure between the second upper portion and the third upper portion.

Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain contact structure formed over a semiconductor substrate, and a first gate stack formed over the semiconductor substrate and adjacent to the source/drain contact structure. The semiconductor device structure also includes an insulating cap structure formed over and separated from an upper surface of the first gate stack. In addition, the semiconductor device structure includes first gate spacers formed over opposing sidewalls of the first gate stack to separate the first gate stack from the source/drain contact structure. The first gate spacers extend over opposing sidewalls of the insulating cap structure, so as to form an air gap surrounded by the first gate spacers, the first gate stack, and the insulating cap structure.

Abstract: A semiconductor device structure includes a gate stack and an adjacent source/drain contact structure formed over a semiconductor substrate. The semiconductor device structure includes a first gate spacer structure extending from a sidewall of the gate stack to a sidewall of the source/drain contact structure, and a second gate spacer structure formed over the first gate spacer structure and between the gate stack and the source/drain contact structure. The second gate spacer structure includes first and second gate spacer layers adjacent to the sidewall of the gate stack and the sidewall of the source/drain contact structure, respectively, and a third gate spacer layer separating the first gate spacer layer from the second gate spacer layer, so that an air gap is sealed by the first, second, and the third gate spacer layers and the first gate spacer structure.

Abstract: A semiconductor device structure includes a gate stack and an adjacent source/drain contact structure formed over a semiconductor substrate. The semiconductor device structure includes a first gate spacer structure extending from a sidewall of the gate stack to a sidewall of the source/drain contact structure, and a second gate spacer structure formed over the first gate spacer structure and between the gate stack and the source/drain contact structure. The second gate spacer structure includes first and second gate spacer layers adjacent to the sidewall of the gate stack and the sidewall of the source/drain contact structure, respectively, and a third gate spacer layer separating the first gate spacer layer from the second gate spacer layer, so that an air gap is sealed by the first, second, and the third gate spacer layers and the first gate spacer structure.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.