Patents by Inventor Chia-Lin Lu

Chia-Lin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9263540
    Abstract: The metal gate structure includes at least a substrate, a dielectric layer, first and second trenches, first metal layer and second metal layers, and two cap layers. In particular, the dielectric layer is disposed on the substrate, and the first and second trenches are disposed in the dielectric layer. The width of the first trench is less than the width of the second trench. The first and second metal layers are respectively disposed in the first trench and the second trench, and the height of the first metal layer is less than or equal to the height of the second metal layer. The cap layers are respectively disposed in a top surface of the first metal layer and a top surface of the second metal layer.
    Type: Grant
    Filed: September 13, 2015
    Date of Patent: February 16, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Shih-Fang Tzou, Chien-Ting Lin, Yi-Wei Chen, Shi-Xiong Lin, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Hsiao-Pang Chou, Chia-Lin Lu
  • Patent number: 9263294
    Abstract: A method of forming a semiconductor device is provided. A material layer, a first flowing material layer and a first mask layer are sequentially formed on a substrate. A first etching process is performed by using the first mask layer as a mask, so as to form a first opening in the material layer. The first mask layer and the first flowing material layer are removed. A filler layer is formed in the first opening. A second flowing material layer is formed on the material layer and the filler layer. A second mask layer is formed on the second flowing material layer. A second etching process is performed by using the second mask layer as a mask, so as to form a second opening in the material layer.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: February 16, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Chieh-Te Chen, Cheng-Hsing Chuang
  • Publication number: 20160043030
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a first dielectric layer, and a first metal plug structure, wherein a circuit element is disposed on the substrate. The first dielectric layer is disposed on the circuit element and on the substrate. The first metal plug structure, including a first barrier metal layer and a first metal interconnector, is embedded in the first dielectric layer. The first metal interconnector is in direct contact with the circuit element. The first barrier metal layer is disposed on the first metal interconnector; wherein the first barrier metal layer and the first metal interconnect have different metal materials.
    Type: Application
    Filed: September 4, 2014
    Publication date: February 11, 2016
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: CHIA-LIN LU, CHUN-LUNG CHEN, KUN-YUAN LIAO, FENG-YI CHANG
  • Publication number: 20160027892
    Abstract: The metal gate structure includes at least a substrate, a dielectric layer, first and second trenches, first metal layer and second metal layers, and two cap layers. In particular, the dielectric layer is disposed on the substrate, and the first and second trenches are disposed in the dielectric layer. The width of the first trench is less than the width of the second trench. The first and second metal layers are respectively disposed in the first trench and the second trench, and the height of the first metal layer is less than or equal to the height of the second metal layer. The cap layers are respectively disposed in a top surface of the first metal layer and a top surface of the second metal layer.
    Type: Application
    Filed: September 13, 2015
    Publication date: January 28, 2016
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Shih-Fang Tzou, Chien-Ting Lin, Yi-Wei Chen, Shi-Xiong Lin, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Hsiao-Pang Chou, Chia-Lin Lu
  • Publication number: 20160020144
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a device thereon; forming a dielectric layer on the device and the substrate; forming a first mask layer on the dielectric layer; removing part of the first mask layer and part of the dielectric layer for forming a patterned first mask layer on the dielectric layer; covering a hard mask on the patterned first mask layer and the dielectric layer; partially removing the hard mask for forming a spacer adjacent to the patterned first mask layer and the dielectric layer; forming a contact hole adjacent to the spacer; filling the contact hole with a metal layer; and planarizing the metal layer for forming a contact plug, wherein the contact plug contacts the dielectric layer and the spacer simultaneously.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 21, 2016
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Chieh-Te Chen
  • Patent number: 9230864
    Abstract: A method of forming a semiconductor device having a metal gate includes the following steps. First of all, a first gate trench is formed in a dielectric layer. Next, a first work function layer is formed, covering the first gate trench. Then, a protection layer is formed in the first gate trench, also on the first work function layer. Then, a patterned sacrificial mask layer is formed in the first gate trench to expose a portion of the protection layer. After that, the exposed protection layer is removed, to form a U-shaped protection layer in the first gate trench. As following, a portion of the first work function layer under the exposed protection layer is removed, to form a U-shaped first work function layer in the first gate trench. Finally, the patterned sacrificial mask layer and the U-shaped protection layer are completely removed.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: January 5, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Shi-Xiong Lin
  • Patent number: 9214392
    Abstract: A method of forming a contact hole includes providing a substrate. A nitrogen-containing dielectric layer, a first material layer, a second material layer, an oxygen-containing dielectric layer and a patterned photoresist layer cover the substrate from bottom to top. Then, the oxygen-containing dielectric layer is etched by taking the second material layer as a first etching stop layer to form a patterned oxygen-containing dielectric layer. Latter, the second material layer is etched by taking the first material layer as a second etching stop layer to form a patterned second material layer. Subsequently, the first material layer is etched by taking the nitrogen-containing dielectric layer as a third etching stop layer to form a patterned first material layer. Finally, the nitrogen-containing dielectric layer is etched until the substrate is exposed.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: December 15, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang
  • Patent number: 9209273
    Abstract: A method for fabricating a metal gate structure includes providing a substrate on which a dielectric layer, a first trench disposed in the dielectric layer, a first metal layer filling up the first trench, a second trench disposed in the dielectric layer, a second metal layer filling up the second trench are disposed, and the width of the first trench is less than the width of the second trench; forming a mask layer to completely cover the second trench; performing a first etching process to remove portions of the first metal layer when the second trench is covered by the mask layer; and performing a second etching process to concurrently remove portions of the first metal layer and portions of the second metal layer after the first etching process.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: December 8, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Chih-Sen Huang, Shih-Fang Tzou, Chien-Ting Lin, Yi-Wei Chen, Shi-Xiong Lin, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Hsiao-Pang Chou, Chia-Lin Lu
  • Publication number: 20150325453
    Abstract: A method of forming a semiconductor device is provided. A material layer, a first flowing material layer and a first mask layer are sequentially formed on a substrate. A first etching process is performed by using the first mask layer as a mask, so as to form a first opening in the material layer. The first mask layer and the first flowing material layer are removed. A filler layer is formed in the first opening. A second flowing material layer is formed on the material layer and the filler layer. A second mask layer is formed on the second flowing material layer. A second etching process is performed by using the second mask layer as a mask, so as to form a second opening in the material layer.
    Type: Application
    Filed: May 8, 2014
    Publication date: November 12, 2015
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Feng-Yi Chang, Chieh-Te Chen, Cheng-Hsing Chuang
  • Publication number: 20100257467
    Abstract: A real-time instruction device in accordance with the present invention comprises a database, a selecting module and a GUI. The database comprises at least multiple classifications and multiple Flash components corresponding to the classifications. The selecting interface allows a teacher to select a classification from the database. The GUI virtually simulates a white board that allows the teacher to dynamically drag a selected Flash component for real-time instruction with boundless space for teaching.
    Type: Application
    Filed: December 4, 2009
    Publication date: October 7, 2010
    Applicant: Bais Education & Technology Co., Ltd.
    Inventors: Chia-Lin Lu, Ya-Pei Chen, Tzu-Yin Lu, Shu-Ching Wang, Ho-Yun Shih, Huei-Chuan Cho, Ching-Yi Chen, Hsueh-Ping Yu, Tzu-Hui Wu, Ping-Kuang Tsai, Yi-Chuan Fang
  • Publication number: 20100062410
    Abstract: The computerized testing device with a network editing interface in accordance with the present invention allows a teacher to generate customized quizzes or teaching materials for students logging into the computerized testing device to take tests through a network. The computerized testing device comprises an examination managing module, a content database, a testing module and a recording module. The network editing interface allows teachers to generate quizzes or teaching materials, and comprises a quiz database, a template database, a teacher database and a network editing interface.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 11, 2010
    Applicant: BAIS Education & Technology Co., Ltd.
    Inventors: Cheng-Hui CHIANG, Chia-Lin Lu, Tzu-Yin Lu, Pei-Ching Cheng, Kuei-Yin Lin, Meng-Chieh Wu, Shu-Ching Wang, Yu-Cheng Hsiao
  • Publication number: 20100035226
    Abstract: A computerized education device, a multimedia production device and associated methods in accordance with the present invention provide students with an adaptive and proactive interaction learning environment. The computerized education device allows students to log in and take tests and comprises a computer-based learning platform, a content database, a student database and a processor. The multimedia production device has multiple-user and multiple-tasking capabilities to produce multimedia materials and comprises a managing server and multiple stations. A FLASH component conversion method generates a Flash component without expensive creation work and comprises acts of retrieving content, sampling, generating a small web format file, generating a data model and generating a FLASH quiz. The interacting method changes difficulty of content based on responses of students and comprises acts of qualifying, entertaining and compiling statistics.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Applicant: BAIS Education & Technology Co., Ltd.
    Inventors: Tzu-Yin LU, Chia-Lin Lu, Ya-Pei Chen, Shu-Ching Wang, Yu-Cheng Hsiao, Pei-Ching Cheng, Ho-Yun Shih, Tai-Ling Li, Kuei-Yin Lin, Yann-Horng Chen, Cheng-Hui Chiang