Abstract: An electronic device is provided. The electronic device includes a first substrate, an insulating layer, a first conductive layer and a second conductive layer. The insulating layer is overlapped with the first substrate. The second conductive layer contacts with the first conductive layer. The first conductive layer and the second conductive layer are disposed between the first substrate and the insulating layer. The second conductive layer is disposed between the first conductive layer and the insulating layer. Moreover, a thermal expansion coefficient of the second conductive layer is between a thermal expansion coefficient of the first conductive layer and a thermal expansion coefficient of the insulating layer.

Abstract: A method for applying eyelash extensions includes: transporting an eyelash extension bundle to an eyelash extensions applying auxiliary, the eyelash extensions each having an attaching end, a root and a distal end, the eyelash extensions applying auxiliary having an attaching reference point, a first reference line and a second reference line, the first and second reference lines or imaginary extension lines thereof being joined at the attaching reference point; the attaching ends of the eyelash extensions being located right at the attaching reference point after the transportation; aligning two of the eyelash extensions in the eyelash extension bundle with the first and second reference lines, respectively, with a pair of tweezers; coating the attaching ends of the eyelash extensions with adhesive, and adhering the attaching ends coated with the adhesive to a root of a human eyelash. Thereby, eyelash extension bundles can all have uniform open angles with enhanced applying quality.

Abstract: A method for applying eyelash extensions includes: transporting an eyelash extension bundle to an eyelash extensions applying auxiliary, the eyelash extensions each having an attaching end, a root and a distal end, the eyelash extensions applying auxiliary having an attaching reference point, a first reference line and a second reference line, the first and second reference lines or imaginary extension lines thereof being joined at the attaching reference point; the attaching ends of the eyelash extensions being located right at the attaching reference point after the transportation; aligning two of the eyelash extensions in the eyelash extension bundle with the first and second reference lines, respectively, with a pair of tweezers; coating the attaching ends of the eyelash extensions with adhesive, and adhering the attaching ends coated with the adhesive to a root of a human eyelash. Thereby, eyelash extension bundles can all have uniform open angles with enhanced applying quality.

Abstract: A virtual platform simulates behavior of a modular circuit based on a circuit design including both high-level and low-level models of circuit modules. A compiler that converts the high-level and low-level models into executable models prior to an initial simulation also generates a separate “replay engine” corresponding to each low-level module for use during subsequent replay simulations. During the initial simulation, the virtual platform simulates circuit behavior by concurrently executing the high-level and low-level executable models and recording data representing behavior of output signals of the low-level design modules modeled by the executable models. To speed up subsequent replays of the simulation, the virtual platform executes one or more of the replay engines in lieu of executing their corresponding low-level executable models.

Abstract: A computer-implemented method to debug testbench code of a testbench associated with a circuit design by recording a trace of call frames along with activities of the circuit design. By correlating and displaying the recorded trace of call frames, the method enables users to easily trace as execution history of subroutines executed by the testbench thereby to debug the testbench code. In addition, users can trace source code of the testbench code by using the recorded trace of call frames. Furthermore, users can debug the testbench code utilizing a virtual simulation, which is done by post-processing records of the virtual simulation stored in a database.

Abstract: A computer-implemented method to debug testbench code of a testbench associated with a circuit design by recording a trace of call frames along with activities of the circuit design. By correlating and displaying the recorded trace of call frames, the method enables users to easily trace as execution history of subroutines executed by the testbench thereby to debug the testbench code. In addition, users can trace source code of the testbench code by using the recorded trace of call frames. Furthermore, users can debug the testbench code utilizing a virtual simulation, which is done by post-processing records of the virtual simulation stored in a database.

Abstract: A computer-implemented method to debug testbench code of a testbench associated with a circuit design by recording a trace of call frames along with activities of the circuit design. By correlating and displaying the recorded trace of call frames, the method enables users to easily trace an execution history of subroutines executed by the testbench thereby to debug the testbench code. In addition, users can trace source code of the testbench code by using the recorded trace of call frames. Furthermore, users can debug the testbench code utilizing a virtual simulation, which is done by post-processing records of the virtual simulation stored in a database.

Abstract: A computer-implemented method to debug testbench and the associated circuit design by recording a trace of call frames along with the activities of the circuit design. By correlating and displaying the recorded call frames, the method enables users to easily trace the execution history of the subroutines and debug the testbench code. In addition, users can trace the source code of the testbench by using the trace of call frames. Furthermore, users can debug with a virtual simulation, which is done by post-processing the simulation records stored in a database.

Abstract: A virtual platform simulates behavior of a modular circuit based on a circuit design including both high-level and low-level models of circuit modules. A compiler that converts the high-level and low-level models into executable models prior to an initial simulation also generates a separate “replay engine” corresponding to each low-level module for use during subsequent replay simulations. During the initial simulation, the virtual platform simulates circuit behavior by concurrently executing the high-level and low-level executable models and recording data representing behavior of output signals of the low-level design modules modeled by the executable models. To speed up subsequent replays of the simulation, the virtual platform executes one or more of the replay engines in lieu of executing their corresponding low-level executable models.