Patents by Inventor Chia-Lun LEE

Chia-Lun LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113203
    Abstract: A method includes providing a fin extending from a substrate, the fin including a plurality of semiconductor channel layers, and where a gate is disposed over the fin. A first spacer layer is deposited over the gate and over the fin in a source/drain region. The first spacer layer has a first etch rate. A second spacer layer is deposited over the first spacer layer. The second spacer layer has a second etch rate less than the first etch rate. The plurality of semiconductor channel layers are removed from the source/drain region to form a trench having a funnel shape. After forming the trench, inner spacers are formed along a sidewall surface of the trench. In various embodiments, lateral sidewall surfaces of each semiconductor channel layer of the plurality of semiconductor channel layers is substantially free of an inner spacer material.
    Type: Application
    Filed: January 25, 2023
    Publication date: April 4, 2024
    Inventors: Che-Lun CHANG, Wei-Yang LEE, Chia-Pin LIN
  • Patent number: 11935781
    Abstract: An integrated circuit (IC) structure includes a gate structure, a source epitaxial structure, a drain epitaxial structure, a front-side interconnection structure, a backside dielectric layer, and a backside via. The source epitaxial structure and the drain epitaxial structure are respectively on opposite sides of the gate structure. The front-side interconnection structure is on a front-side of the source epitaxial structure and a front-side of the drain epitaxial structure. The backside dielectric layer is on a backside of the source epitaxial structure and a backside of the drain epitaxial structure and has an air gap therein. The backside via extends through the backside dielectric layer to a first one of the source epitaxial structure and the drain epitaxial structure.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Lun Chang, Wei-Yang Lee, Chia-Pin Lin, Yuan-Ching Peng
  • Patent number: 11783747
    Abstract: A display device includes readout line, first circuit, second circuit, and third circuit. Readout line includes first side and second side. First side is opposite to the second side. Each of first circuit, second circuit, and third circuit is coupled to readout line. Each of first circuit and third circuit is located at first side of readout line. First circuit resets according to first scan signal at first stage. Second circuit is located at second side of readout line. Second circuit and first circuit are arranged in dislocation manner. Second circuit reads first light sensing signal to output to readout line according to first scan signal at first stage. Third circuit and second circuit are arranged in dislocation manner, and third circuit is directly adjacent to first circuit. Third circuit senses light so as to generate second light sensing signal according to second scan signal at first stage.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: October 10, 2023
    Assignee: AUO CORPORATION
    Inventors: Po-Chun Lai, Ling-Ying Chien, Li-Wei Shih, Ching-Sheng Cheng, Chih-Lung Lin, Chia-Lun Lee
  • Publication number: 20230306885
    Abstract: A display device includes readout line, first circuit, second circuit, and third circuit. Readout line includes first side and second side. First side is opposite to the second side. Each of first circuit, second circuit, and third circuit is coupled to readout line. Each of first circuit and third circuit is located at first side of readout line. First circuit resets according to first scan signal at first stage. Second circuit is located at second side of readout line. Second circuit and first circuit are arranged in dislocation manner. Second circuit reads first light sensing signal to output to readout line according to first scan signal at first stage. Third circuit and second circuit are arranged in dislocation manner, and third circuit is directly adjacent to first circuit. Third circuit senses light so as to generate second light sensing signal according to second scan signal at first stage.
    Type: Application
    Filed: December 7, 2022
    Publication date: September 28, 2023
    Inventors: Po-Chun LAI, Ling-Ying CHIEN, Li-Wei SHIH, Ching-Sheng CHENG, Chih-Lung LIN, Chia-Lun LEE
  • Publication number: 20220276097
    Abstract: An optical sensor circuit is provided. In the optical sensor circuit, an output stage circuit transmits a voltage of first and second node to the output line according to a first driving signal. A first sensor is configured to generate a first photocurrent according to a first color light that senses an ambient light, and generate a second photocurrent according to a second color light. A second sensor is configured to generate a third photocurrent according to a third color light, and generate a fourth photocurrent according to the second color light. In a sensing phase, when the first sensor senses the first color light, and the second sensor senses the third color light, the first sensor adjusts a voltage level of the voltage according to the first photocurrent, and the second sensor adjusts the voltage level of the voltage according to the third photocurrent.
    Type: Application
    Filed: May 11, 2022
    Publication date: September 1, 2022
    Applicants: Au Optronics Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Chia-En Wu, Chia-Lun Lee, Jui-Hung Chang, Jian-Shen Yu
  • Patent number: 11371885
    Abstract: An optical sensor circuit is provided. In the optical sensor circuit, an output stage circuit transmits a voltage of first and second node to the output line according to a first driving signal. A first sensor is configured to generate a first photocurrent according to a first color light that senses an ambient light, and generate a second photocurrent according to a second color light. A second sensor is configured to generate a third photocurrent according to a third color light, and generate a fourth photocurrent according to the second color light. In a sensing phase, when the first sensor senses the first color light, and the second sensor senses the third color light, the first sensor adjusts a voltage level of the voltage according to the first photocurrent, and the second sensor adjusts the voltage level of the voltage according to the third photocurrent.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: June 28, 2022
    Assignees: Au Optronics Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Chia-En Wu, Chia-Lun Lee, Jui-Hung Chang, Jian-Shen Yu
  • Patent number: 11035724
    Abstract: An optical sensing circuit includes a first light sensor, a second light sensor, a third light sensor, a capacitor, and a sampling circuit. The first light sensor, the second light sensor, and the third light sensor are respectively covered by a first color filter, a second color filter, and a third color filter. The first light sensor is coupled to the capacitor, the sampling circuit, and the third light sensor. The second light sensor is coupled to the first light sensor and is configured to receive a first sensing signal. The third light sensor is coupled between the first light sensor and a voltage source.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: June 15, 2021
    Assignees: AU OPTRONICS CORPORATION, NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chih-Lung Lin, Fu-Hsing Chen, Chia-Lun Lee, Chia-En Wu, Jian-Shen Yu
  • Publication number: 20200158567
    Abstract: An optical sensing circuit includes a first light sensor, a second light sensor, a third light sensor, a capacitor, and a sampling circuit. The first light sensor, the second light sensor, and the third light sensor are respectively covered by a first color filter, a second color filter, and a third color filter. The first light sensor is coupled to the capacitor, the sampling circuit, and the third light sensor. The second light sensor is coupled to the first light sensor and is configured to receive a first sensing signal. The third light sensor is coupled between the first light sensor and a voltage source.
    Type: Application
    Filed: October 2, 2019
    Publication date: May 21, 2020
    Inventors: Chih-Lung LIN, Fu-Hsing CHEN, Chia-Lun LEE, Chia-En WU, Jian-Shen YU
  • Publication number: 20200158574
    Abstract: An optical sensor circuit is provided. In the optical sensor circuit, an output stage circuit transmits a voltage of first and second node to the output line according to a first driving signal. A first sensor is configured to generate a first photocurrent according to a first color light that senses an ambient light, and generate a second photocurrent according to a second color light. A second sensor is configured to generate a third photocurrent according to a third color light, and generate a fourth photocurrent according to the second color light. In a sensing phase, when the first sensor senses the first color light, and the second sensor senses the third color light, the first sensor adjusts a voltage level of the voltage according to the first photocurrent, and the second sensor adjusts the voltage level of the voltage according to the third photocurrent.
    Type: Application
    Filed: October 7, 2019
    Publication date: May 21, 2020
    Applicants: Au Optronics Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Chia-En Wu, Chia-Lun Lee, Jui-Hung Chang, Jian-Shen Yu