Patents by Inventor CHIA-MING LI

CHIA-MING LI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114619
    Abstract: An electronic device including an electronic unit and a redistribution layer is disclosed. The electronic unit has connection pads. The redistribution layer is electrically connected to the electronic unit and includes a first insulating layer, a first metal layer and a second insulating layer. The first insulating layer is disposed on the electronic unit and has first openings disposed corresponding to the connection pads. The first metal layer is disposed on the first insulating layer and electrically connected to the electronic unit through the connection pads. The second insulating layer is disposed on the first metal layer. The first insulating layer includes first filler particles, and the second insulating layer includes second filler particles. The first filler particles have a first maximum particle size, the second filler particles have a second maximum particle size, and the second maximum particle size is greater than the first maximum particle size.
    Type: Application
    Filed: December 2, 2022
    Publication date: April 4, 2024
    Applicant: InnoLux Corporation
    Inventors: Cheng-Chi WANG, Chin-Ming HUANG, Chien-Feng LI, Chia-Lin YANG
  • Patent number: 11950491
    Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: April 2, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao, Chun-Chieh Lee, Chia-Hua Li, Huei-Shuan Tan
  • Patent number: 11942467
    Abstract: A semiconductor structure includes a first metal-dielectric-metal layer, a first dielectric layer, a first conductive layer, a second conductive layer, and a second dielectric layer. The first metal-dielectric-metal layer includes a plurality of first fingers, a plurality of second fingers, and a first dielectric material. The first fingers are electrically connected to a first voltage. The second fingers are electrically connected to a second voltage different from the first voltage, and the first fingers and the second fingers are arranged in parallel and staggeredly. The first dielectric material is between the first fingers and the second fingers. The first dielectric layer is over the first metal-dielectric-metal layer. The first conductive layer is over the first dielectric layer. The second conductive layer is over the first conductive layer. The second dielectric layer is between the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: I-Sheng Chen, Yi-Jing Li, Chia-Ming Hsu, Wan-Lin Tsai, Clement Hsingjen Wann
  • Patent number: 11927788
    Abstract: A light guide module is provided, which includes a circuit board, one or more light-emitting elements, a light guide plate, a first reflective layer and a second reflective layer. The one or more light-emitting elements are disposed on the circuit board. The light guide plate is located on the circuit board, in which the light guide plate has a thick portion and a thin portion connected to the thick portion, and the thin portion is located over the one or more light-emitting elements, and a side surface of the thick portion adjacent to the thin portion is laterally adjacent to the one or more light-emitting elements. The first reflective layer covers a side surface of the thick portion away from the thin portion. The second reflective layer covers an upper surface of the thick portion and an upper surface of the thin portion.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: March 12, 2024
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Chia-Ming Li, Hui-Ling Lin
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11916151
    Abstract: Present disclosure provides a semiconductor structure, including a semiconductor fin having a first portion and a second portion over the first portion, a first conductive region abutting a first lateral surface of the first portion and a first lateral surface of the second portion, a metal gate having a bottom portion and an upper portion, the bottom portion being between the first portion and the second portion of the semiconductor fin, and the upper portion being over the second portion of the semiconductor fin, and a first spacer between the bottom portion of the metal gate and the first conductive region. A method for manufacturing the semiconductor structure described herein is also provided.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Ming Hsu, Yi-Jing Li, Chih-Hsin Ko, Kuang-Hsin Chen, Da-Wen Lin, Clement Hsingjen Wann
  • Patent number: 11754769
    Abstract: A backlight kit includes a base member, a covering member, a slim-type light guide element and an illumination module. The covering member is combined with the base member. The slim-type light guide element and the illumination module are arranged between the base member and the covering member. After the illumination module emits a light beam to the slim-type light guide element, the light beam is transferred through the slim-type light guide element. Consequently, a luminance gradient region is formed on the surface of the covering member.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: September 12, 2023
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Wei-Ping Chan, Ruey-Piin Wang, Chia-Ming Li, Hung-Wei Kuo
  • Patent number: 11746968
    Abstract: A miniature backlight kit includes a covering member, a light-shading element, a light guide element, a housing and a light-emitting unit. The light-emitting unit is disposed within a first concave structure of the light-shading element. The light-shading element is disposed within a second concave structure of the light guide element. The light guide element is covered by the lateral wall of the housing. The light-emitting unit emits a light beam. The light beam is reflected to the lateral wall of the housing by the light guide element. Consequently, a luminance gradient region is formed on the surface of the lateral wall of the housing.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: September 5, 2023
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Wei-Ping Chan, Ruey-Piin Wang, Chia-Ming Li, Yin-Liang Hu, Ming-Han Yu
  • Publication number: 20230232546
    Abstract: A rigid-flex board is manufactured by attaching multiple self-adhesive copper foil films to a flexible circuit board through multiple build-up processes, thereby eliminating the need to pre-fabricate a rigid board and slot the rigid board. The build-up processes of the self-adhesive copper foil films allow the resulting rigid boards to be highly uniform in thickness so that thickness deviation of the rigid-flex board can be reduced.
    Type: Application
    Filed: May 6, 2022
    Publication date: July 20, 2023
    Inventor: CHIA-MING LI
  • Publication number: 20230230929
    Abstract: A packaging process for embedded chips includes: (1) mounting at least one IC chip on a circuit substrate, the IC chip having at least one exposed pin; (2) attaching a self-adhesive copper foil film to the surface of the circuit substrate, wherein the self-adhesive copper foil film has a copper foil layer and a B-stage insulating adhesive layer, the copper foil layer has at least one to-be-opened copper foil area corresponding to the pin, the insulating adhesive layer is applied on the copper foil layer, has no glass fiber, covers the IC chip, and has at least one to-be-opened insulating adhesive area corresponding to the pin, and the pin is in contact with the insulating adhesive layer but not with the copper foil layer; (3) removing the to-be-opened copper foil area; (4) removing the to-be-opened insulating adhesive area with an etching solution; and (5) curing the insulating adhesive layer completely.
    Type: Application
    Filed: April 8, 2022
    Publication date: July 20, 2023
    Inventor: CHIA-MING LI
  • Patent number: 10580350
    Abstract: A micro light emitting diode module contains: multiple flip-chip LEDs and a dielectric layer. The multiple flip-chip LEDs are arranged side by side. The flip-chip LEDs have a light emitting side and an electrical connecting side. The electrical connecting side of the flip-chip LEDs has a p-contact pad and an n pad. The dielectric layer is formed on the electrical connecting side of the flip-chip LEDs. The dielectric layer has multiple electric channels in which multiple electrical circuits are formed. The electrical circuits are corresponded to the p-contact pads and the n-contact pads of the flip-chip LEDs respectively, and each electrical circuit is electrically connected to its corresponding p-contact pad or n-contact pad. By reconstruction of circuits on LED array, the present invention not only has high processing yield, but also significantly reduces the manufacturing time. A method for making the micro light emitting diode module is also provided.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: March 3, 2020
    Assignee: Uniflex Technology Inc.
    Inventors: Yuan-Chih Lee, Chia-Ming Li
  • Publication number: 20190251894
    Abstract: A micro light emitting diode module contains: multiple flip-chip LEDs and a dielectric layer. The multiple flip-chip LEDs are arranged side by side. The flip-chip LEDs have a light emitting side and an electrical connecting side. The electrical connecting side of the flip-chip LEDs has a p-contact pad and an n pad. The dielectric layer is formed on the electrical connecting side of the flip-chip LEDs. The dielectric layer has multiple electric channels in which multiple electrical circuits are formed. The electrical circuits are corresponded to the p-contact pads and the n-contact pads of the flip-chip LEDs respectively, and each electrical circuit is electrically connected to its corresponding p-contact pad or n-contact pad. By reconstruction of circuits on LED array, the present invention not only has high processing yield, but also significantly reduces the manufacturing time. A method for making the micro light emitting diode module is also provided.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 15, 2019
    Inventors: YUAN-CHIH LEE, CHIA-MING LI
  • Publication number: 20110120233
    Abstract: An adapter of the present invention includes a torsion rod for transferring torsion force between two tools/workpieces. The torsion rod has at least one arc surface disposed on its periphery. The arc surface and the torsion rod are concentric. A strain meter is disposed on the arc surface, and a displayer connects to the strain meter. As such, the adapter of the present invention can measure the torque value more precisely.
    Type: Application
    Filed: December 25, 2009
    Publication date: May 26, 2011
    Inventor: CHIA-MING LI