Patents by Inventor Chia-Nan LIN
Chia-Nan LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136183Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
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Publication number: 20240136291Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.Type: ApplicationFiled: January 12, 2023Publication date: April 25, 2024Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
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Patent number: 11967522Abstract: A method includes depositing an etch stop layer over a first conductive feature, performing a first treatment to amorphize the etch stop layer, depositing a dielectric layer over the etch stop layer, etching the dielectric layer to form an opening, etching-through the etch stop layer to extend the opening into the etch stop layer, and filling the opening with a conductive material to form a second conductive feature.Type: GrantFiled: April 25, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jyh-Nan Lin, Chia-Yu Wu, Kai-Shiung Hsu, Ding-I Liu
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Patent number: 11937932Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.Type: GrantFiled: July 8, 2022Date of Patent: March 26, 2024Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITYInventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
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Patent number: 11935836Abstract: A semiconductor device includes a bridge and a first integrated circuit. The bridge is free of active devices and includes a first conductive connector. The first integrated circuit includes a substrate and a second conductive connector disposed in a first dielectric layer over the substrate. The second conductive connector is directly bonded to the first conductive connector. The second conductive connector includes conductive pads and first conductive vias and a second conductive via between the conductive pads. The second conductive via is not overlapped with the first conductive vias while the first conductive vias are overlapped with one another. A vertical distance between the second conductive via and the first conductive connector is larger than a vertical distance between each of the first conductive vias and the first conductive connector, and a sidewall of the first dielectric layer is substantially flush with a sidewall of the substrate.Type: GrantFiled: August 9, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Hung Lin, An-Jhih Su, Der-Chyang Yeh, Shih-Guo Shen, Chia-Nan Yuan, Ming-Shih Yeh
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Patent number: 10672614Abstract: Embodiments described herein relate generally to methods for etching structures and the structures formed thereby. In some embodiments, an etch selectivity between a first portion of a material and a second portion of the material is increased. Increasing the etch selectivity includes performing an anisotropic treatment, such as an anisotropic ion implantation, on the material to treat the first portion of the material, and the second portion of the material remains untreated after the anisotropic treatment. After increasing the etch selectivity, the first portion of the material is etched. The etching may be a wet or dry etch, and may further be isotropic or anisotropic.Type: GrantFiled: November 29, 2018Date of Patent: June 2, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuan-Wei Huang, Yu-Yu Chen, Chia-Nan Lin
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Patent number: 10631217Abstract: A method for pre-empting a wireless resource is provided in the invention. The method is applied to a communication system. The method includes the steps of transmitting, using the plurality of UE in a first network, measurement reports of a plurality of user equipment (UE) to a radio access node wherein the first network is provided by the radio access node; according to the priority level of the UE bearer corresponding to each UE, selecting a plurality of candidate UE bearers from all of the UE bearers; determining whether the UE corresponding to each of the candidate UE bearers can connect to other heterogeneous networks; and selecting one of the candidate UE bearers corresponding to the UE which can connect to other heterogeneous networks to perform the pre-emption.Type: GrantFiled: December 13, 2017Date of Patent: April 21, 2020Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventor: Chia-Nan Lin
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Publication number: 20190182735Abstract: A method for pre-empting a wireless resource is provided in the invention. The method is applied to a communication system. The method includes the steps of transmitting, using the plurality of UE in a first network, measurement reports of a plurality of user equipment (UE) to a radio access node wherein the first network is provided by the radio access node; according to the priority level of the UE bearer corresponding to each UE, selecting a plurality of candidate UE bearers from all of the UE bearers; determining whether the UE corresponding to each of the candidate UE bearers can connect to other heterogeneous networks; and selecting one of the candidate UE bearers corresponding to the UE which can connect to other heterogeneous networks to perform the pre-emption.Type: ApplicationFiled: December 13, 2017Publication date: June 13, 2019Inventor: Chia-Nan LIN
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Publication number: 20190148158Abstract: Embodiments described herein relate generally to methods for etching structures and the structures formed thereby. In some embodiments, an etch selectivity between a first portion of a material and a second portion of the material is increased. Increasing the etch selectivity includes performing an anisotropic treatment, such as an anisotropic ion implantation, on the material to treat the first portion of the material, and the second portion of the material remains untreated after the anisotropic treatment. After increasing the etch selectivity, the first portion of the material is etched. The etching may be a wet or dry etch, and may further be isotropic or anisotropic.Type: ApplicationFiled: November 15, 2017Publication date: May 16, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuan-Wei Huang, Yu-Yu Chen, Chia-Nan Lin
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Publication number: 20190148159Abstract: Embodiments described herein relate generally to methods for etching structures and the structures formed thereby. In some embodiments, an etch selectivity between a first portion of a material and a second portion of the material is increased. Increasing the etch selectivity includes performing an anisotropic treatment, such as an anisotropic ion implantation, on the material to treat the first portion of the material, and the second portion of the material remains untreated after the anisotropic treatment. After increasing the etch selectivity, the first portion of the material is etched. The etching may be a wet or dry etch, and may further be isotropic or anisotropic.Type: ApplicationFiled: November 29, 2018Publication date: May 16, 2019Inventors: Kuan-Wei Huang, Yu-Yu Chen, Chia-Nan Lin
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Patent number: 10269576Abstract: Embodiments described herein relate generally to methods for etching structures and the structures formed thereby. In some embodiments, an etch selectivity between a first portion of a material and a second portion of the material is increased. Increasing the etch selectivity includes performing an anisotropic treatment, such as an anisotropic ion implantation, on the material to treat the first portion of the material, and the second portion of the material remains untreated after the anisotropic treatment. After increasing the etch selectivity, the first portion of the material is etched. The etching may be a wet or dry etch, and may further be isotropic or anisotropic.Type: GrantFiled: November 15, 2017Date of Patent: April 23, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuan-Wei Huang, Yu-Yu Chen, Chia-Nan Lin
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Patent number: 10230096Abstract: An electrode is provided, which includes a sulfur- and carbon-containing layer having a carbon material, a sulfur material, and a binder. A sulfur content at a core part of the sulfur- and carbon-containing layer is gradually reduced to a sulfur content at two side surfaces of the sulfur- and carbon-containing layer. The electrode may serve as a positive electrode of a battery. The battery also includes a negative electrode, and an electrolyte liquid between the positive electrode and the negative electrode.Type: GrantFiled: December 30, 2015Date of Patent: March 12, 2019Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia-Nan Lin, Jason Fang, Chih-Ching Chang, Chun-Lung Li
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Publication number: 20170162861Abstract: An electrode is provided, which includes a sulfur- and carbon-containing layer having a carbon material, a sulfur material, and a binder. A sulfur content at a core part of the sulfur- and carbon-containing layer is gradually reduced to a sulfur content at two side surfaces of the sulfur- and carbon-containing layer. The electrode may serve as a positive electrode of a battery. The battery also includes a negative electrode, and an electrolyte liquid between the positive electrode and the negative electrode.Type: ApplicationFiled: December 30, 2015Publication date: June 8, 2017Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia-Nan LIN, Jason FANG, Chih-Ching CHANG, Chun-Lung LI