Patents by Inventor Chia-Ning Peng

Chia-Ning Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8015475
    Abstract: A system comprising communication logic capable of receiving data signals from a network. The signals comprise both erasure error and random error. The system also comprises processing logic coupled to the communication logic and adapted to partition parity check bytes of the received signals into a first portion and a second portion. The processing logic uses the first portion for random error correction and the second portion for erasure error correction.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: September 6, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Jin Lu, Po Tong, Chia-Ning Peng
  • Patent number: 7499487
    Abstract: Systems and methods are disclosed for determining mitigating noise in multi-pair communication system. A receiver coordinated system can include an error estimator that estimates noise for a first line of a plurality lines and provides an error estimate for the first line. A noise predictor applies a predetermined cross-correlation value to the error estimate to provide a correlated noise term that describes noise cross-correlation between the first line and a second line of the plurality of lines. A noise decorrelation component applies the cross-correlated noise term to substantially decorrelate noise for the second line.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: March 3, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Georgios Ginis, Chia-Ning Peng
  • Publication number: 20090031197
    Abstract: A system comprising communication logic capable of receiving data signals from a network. The signals comprise both erasure error and random error. The system also comprises processing logic coupled to the communication logic and adapted to partition parity check bytes of the received signals into a first portion and a second portion. The processing logic uses the first portion for random error correction and the second portion for erasure error correction.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 29, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jin LU, Po TONG, Chia-Ning PENG
  • Publication number: 20080052609
    Abstract: Methods and apparatus to perform erasure forecasting in communication systems are disclosed. A disclosed example apparatus comprises a forward error correction (FEC) decoder to decode a first codeword and to provide a first error indication for the first codeword, an erasure forecaster to make an erasure decision for a second codeword based on the first error indication, and an erasure forecasting state table including a first field associated with first interleaved data and a second field associated with second interleaved data, the second codeword containing a first element from the first interleaved data and a second element from the second interleaved data.
    Type: Application
    Filed: August 14, 2006
    Publication date: February 28, 2008
    Inventors: Chia-Ning Peng, Po Tong, Cory Samuel Modlin, Peter James Melsa
  • Publication number: 20060114977
    Abstract: Systems and methods are disclosed for determining mitigating noise in multi-pair communication system. A receiver coordinated system can include an error estimator that estimates noise for a first line of a plurality lines and provides an error estimate for the first line. A noise predictor applies a predetermined cross-correlation value to the error estimate to provide a correlated noise term that describes noise cross-correlation between the first line and a second line of the plurality of lines. A noise decorrelation component applies the cross-correlated noise term to substantially decorrelate noise for the second line.
    Type: Application
    Filed: November 30, 2005
    Publication date: June 1, 2006
    Inventors: Georgios Ginis, Chia-Ning Peng
  • Publication number: 20050286620
    Abstract: A multiple port digital subscriber line (DSL) modem for effecting DSL communications over bonded twisted-pair wire facilities is disclosed. The frame boundaries of DSL frames communicated by the modem from its ports are synchronized in time during DSL initialization by controlling the frame at which cyclic affices are appended. The cyclic affix has a known length, and the time delays among the various ports are known. Adjustment at the frame at which the cyclic affix is first applied can be accomplished by controlling the number of frames transmitted without the cyclic affix prior to the point of appending cyclic affices, according to the relative delay among the ports. Because the cyclic affix has a length that is a fraction of a frame, the relative frame timing can be adjusted by this fraction in this manner.
    Type: Application
    Filed: June 17, 2005
    Publication date: December 29, 2005
    Applicant: Texas Instruments Incorporated
    Inventor: Chia-Ning Peng