Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: A method to form an electrical component, the method comprising: providing a first lead and a second lead; forming a first conductive pillar and a second conductive pillar on a first portion of the top surface of the first lead and a first portion of the top surface of the second lead, respectively, wherein a second portion of the top surface of the first lead, a second portion of the top surface of the second lead, the first conductive pillar, and the second conductive pillar form a 3D space, wherein at least one device is disposed in said 3D space and electrically connected to the at least one device to the first conductive pillar and the second conductive pillar.

Abstract: A method to form an electrical component, the method comprising: providing a first lead and a second lead; forming a first conductive pillar and a second conductive pillar on a first portion of the top surface of the first lead and a first portion of the top surface of the second lead, respectively, wherein a second portion of the top surface of the first lead, a second portion of the top surface of the second lead, the first conductive pillar, and the second conductive pillar form a 3D space, wherein at least one device is disposed in said 3D space and electrically connected to the at least one device to the first conductive pillar and the second conductive pillar.

Abstract: The present invention discloses a leadframe in which two conductive pillars with a high aspect ratio and the corresponding two leads of the leadframe form a 3D space for accommodating at least one device. A first lead and a second lead are spaced apart from each other. A first conductive pillar is formed on the first lead by disposing a first via on the first lead, wherein at least one first conductive material is filled inside the first via to form the first conductive pillar. A second conductive pillar is formed on the second lead by disposing a second via on the second lead, wherein at least one second conductive material is filled inside the second via to form the second conductive pillar. The first lead, the second lead, the first conductive pillar, and the second conductive pillar form a 3D space for accommodating at least one device, wherein the at least one device is electrically connected to the first conductive pillar and the second conductive pillar.

Abstract: The present invention discloses a leadframe in which two conductive pillars with a high aspect ratio and the corresponding two leads of the leadframe form a 3D space for accommodating at least one device. A first lead and a second lead are spaced apart from each other. A first conductive pillar is formed on the first lead by disposing a first via on the first lead, wherein at least one first conductive material is filled inside the first via to form the first conductive pillar. A second conductive pillar is formed on the second lead by disposing a second via on the second lead, wherein at least one second conductive material is filled inside the second via to form the second conductive pillar. The first lead, the second lead, the first conductive pillar, and the second conductive pillar form a 3D space for accommodating at least one device, wherein the at least one device is electrically connected to the first conductive pillar and the second conductive pillar.

Abstract: The present invention discloses a leadframe in which two conductive pillars with high aspect ratio and the corresponding two leads of the leadframe forms a 3D space for accommodating at least one device. A first lead and a second lead are spaced apart from each other. A first conductive pillar is formed on the first lead by disposing a first via on the first lead, wherein at least one first conductive material is filled inside the first via to form the first conductive pillar. A second conductive pillar is formed on the second lead by disposing a second via on the second lead, wherein at least one second conductive material is filled inside the second via to form the second conductive pillar. The first lead, the second lead, the first conductive pillar, and the second conductive pillar form a 3D space for accommodating at least one device, wherein the at least one device is electrically connected to the first conductive pillar and the second conductive pillar.

Abstract: An electronic component is disclosed, the electronic component comprising: a conductive structure, comprising a plurality of conductive layers separated by a plurality of insulating layers, wherein the plurality of conductive layers and the plurality of insulating layers are stacked in a vertical direction, wherein the plurality of conductive layers forms at least one coil, wherein each of the coil is formed along the vertical direction across said plurality of conductive layers, wherein the plurality of insulating layers are not supported by a substrate.

Abstract: The present invention discloses a leadframe in which two conductive pillars with high aspect ratio and the corresponding two leads of the leadframe forms a 3D space for accommodating at least one device. A first lead and a second lead are spaced apart from each other. A first conductive pillar is formed on the first lead by disposing a first via on the first lead, wherein at least one first conductive material is filled inside the first via to form the first conductive pillar. A second conductive pillar is formed on the second lead by disposing a second via on the second lead, wherein at least one second conductive material is filled inside the second via to form the second conductive pillar. The first lead, the second lead, the first conductive pillar, and the second conductive pillar form a 3D space for accommodating at least one device, wherein the at least one device is electrically connected to the first conductive pillar and the second conductive pillar.