Patents by Inventor Chia Pin Chen

Chia Pin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142961
    Abstract: A method of estimating greenhouse gas emission, performed by a processing device, includes: obtaining at least one time period of a number of working stations for a target manufacturing process of a product; obtaining a number of first power consumption data of the target manufacturing process, wherein the first power consumption data correspond to the working stations respectively; calculating a number of second power consumption data based on the at least one time period and the first power consumption data; searching for a number of target coefficients corresponding to the plurality of working stations respectively in coefficient database based on the target manufacturing process; and calculating greenhouse gas emission data of the target manufacturing process based on the second power consumption data and the target coefficients.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Tsung-Hsi LIN, Yun Sheng LI, Yu Ling LEE, Hsiao Pin LIN, Chia Hou CHEN
  • Publication number: 20240128376
    Abstract: A device a includes a substrate, two source/drain (S/D) features over the substrate, and semiconductor layers suspended over the substrate and connecting the two S/D features. The device further includes a dielectric layer disposed between two adjacent layers of the semiconductor layers and an air gap between the dielectric layer and one of the S/D features, where a ratio between a length of the air gap to a thickness of the first dielectric layer is in a range of 0.1 to 1.0.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Inventors: Shih-Chiang Chen, Wei-Yang Lee, Chia-Pin Lin, Yuan-Ching Peng
  • Publication number: 20240031454
    Abstract: The present disclosure relates to a system, a method and a computer-readable medium for data accessing. The method includes receiving a request, receiving a status parameter of an endpoint corresponding to the request, receiving a number of times of receiving the request in a period of time, and determining a delay time length for transmitting the request according to the status parameter of the endpoint or the number of times of receiving the request in the period of time. The present disclosure can achieve more efficient resource allocation and can prevent server outage.
    Type: Application
    Filed: May 5, 2023
    Publication date: January 25, 2024
    Inventors: Yung-Chi HSU, Chia-Pin CHEN, Jhu-Kai SONG, Liang-Tse CHIANG
  • Patent number: 11798859
    Abstract: An electronic device package includes an encapsulated electronic component, a substrate, a conductor and a buffer layer. The encapsulated electronic component includes a redistribution layer (RDL) and an encapsulation layer. The first surface is closer to the RDL than the second surface is. The encapsulation layer includes a first surface, and a second surface opposite to the first surface. The substrate is disposed on the second surface of the encapsulation layer. The conductor is disposed between the substrate and the encapsulated electronic component, and electrically connecting the substrate to the encapsulated electronic component. The buffer layer is disposed between the substrate and the encapsulated electronic component and around the conductor.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: October 24, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia-Pin Chen, Chia-Sheng Tien, Wan-Ting Chiu, Chi Long Tsai
  • Publication number: 20230115954
    Abstract: An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.
    Type: Application
    Filed: October 13, 2021
    Publication date: April 13, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: En Hao HSU, Kuo Hwa TZENG, Chia-Pin CHEN, Chi Long TSAI
  • Publication number: 20220384208
    Abstract: A manufacturing method for manufacturing a package structure is provided. The manufacturing method includes: (a) providing a carrier having a top surface and a lateral side surface, wherein the top surface includes a main portion and a flat portion connecting the lateral side surface, and a first included angle between the main portion and the flat portion is less than a second included angle between the main portion and the lateral side surface; (b) forming an under layer on the carrier to at least partially expose the flat portion; and (c) forming a dielectric layer on the under layer and covering the exposed flat portion.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia-Pin CHEN, Chia Sheng TIEN, Wan-Ting CHIU, Chi Long TSAI, Cyuan-Hong SHIH, Yen Liang CHEN
  • Publication number: 20220367306
    Abstract: An electronic device package includes an encapsulated electronic component, a substrate, a conductor and a buffer layer. The encapsulated electronic component includes a redistribution layer (RDL) and an encapsulation layer. The first surface is closer to the RDL than the second surface is. The encapsulation layer includes a first surface, and a second surface opposite to the first surface. The substrate is disposed on the second surface of the encapsulation layer. The conductor is disposed between the substrate and the encapsulated electronic component, and electrically connecting the substrate to the encapsulated electronic component. The buffer layer is disposed between the substrate and the encapsulated electronic component and around the conductor.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chia-Pin CHEN, Chia-Sheng TIEN, Wan-Ting CHIU, Chi Long TSAI
  • Publication number: 20210272866
    Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya-Yu HSIEH, Chin-Li KAO, Chung-Hsuan TSAI, Chia-Pin CHEN
  • Patent number: 11011444
    Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: May 18, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ya-Yu Hsieh, Chin-Li Kao, Chung-Hsuan Tsai, Chia-Pin Chen
  • Publication number: 20210050273
    Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.
    Type: Application
    Filed: August 14, 2019
    Publication date: February 18, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya-Yu HSIEH, Chin-Li KAO, Chung-Hsuan TSAI, Chia-Pin CHEN
  • Patent number: 9450671
    Abstract: According to one exemplary embodiment, a light communication system comprises a transmitting apparatus and a receiving apparatus. The transmitting apparatus generates one or more patterns of light to decide at least one reference area, and transmits signals by emitting light in the at least one reference area decided by the one or more patterns. The receiving apparatus takes measurements fewer than a total amount of pixels over a sensed image to detect the one or more patterns of light, and decides at least one ROI according to one or more detected one or more patterns; then takes all signals of light in the at least one ROI for processing of the light communication, and takes measurements fewer than a total amount of pixels over at least one tracking area for tracking the one or more patterns of light emitted by the transmitting apparatus.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: September 20, 2016
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Pin Chen, Chang-Lung Hsiao, Ren-Jr Chen
  • Patent number: 8942571
    Abstract: In a light communication system, a data embedding unit arranged between a transmitter-side communication data processing unit and a light emitting device driver embeds a communication processed data at a spatial domain of an original image according to a modulation scheme, and gets multiple RGB values for a communication data embedded image. A receiving apparatus detects a transmitter-side communication data embedded image, generates a receiver-side communication data embedded image, compensate a deformation of the receiver-side communication data embedded image, outputs a warped communication data embedded image, and extracts a communication processed data from the warped communication data embedded image.
    Type: Grant
    Filed: December 24, 2012
    Date of Patent: January 27, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Pin Chen, Chang-Lung Hsiao, Ren-Jr Chen, Pei-Wei Hsu
  • Publication number: 20140178080
    Abstract: In a light communication system, a data embedding unit arranged between a transmitter-side communication data processing unit and a light emitting device driver embeds a communication processed data at a spatial domain of an original image according to a modulation scheme, and gets multiple RGB values for a communication data embedded image. A receiving apparatus detects a transmitter-side communication data embedded image, generates a receiver-side communication data embedded image, compensate a deformation of the receiver-side communication data embedded image, outputs a warped communication data embedded image, and extracts a communication processed data from the warped communication data embedded image.
    Type: Application
    Filed: December 24, 2012
    Publication date: June 26, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Pin Chen, Chang-Lung Hsiao, Ren-Jr Chen, Pei-Wei Hsu
  • Publication number: 20130251374
    Abstract: According to one exemplary embodiment, a light communication system comprises a transmitting apparatus and a receiving apparatus. The transmitting apparatus generates one or more patterns of light to decide at least one reference area, and transmits signals by emitting light in the at least one reference area decided by the one or more patterns. The receiving apparatus takes measurements fewer than a total amount of pixels over a sensed image to detect the one or more patterns of light, and decides at least one ROI according to one or more detected one or more patterns; then takes all signals of light in the at least one ROI for processing of the light communication, and takes measurements fewer than a total amount of pixels over at least one tracking area for tracking the one or more patterns of light emitted by the transmitting apparatus.
    Type: Application
    Filed: November 7, 2012
    Publication date: September 26, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Pin CHEN, Chang-Lung HSIAO, Ren-Jr CHEN
  • Publication number: 20130003797
    Abstract: According to one exemplary embodiment of a universal modem system, multiple digital signal processors (DSPs) are configured to perform at least one streaming-based task, or at least one block-based task, or both of the tasks. At least one concatenate memory is configured to store data for the at least one streaming-based task At least one concatenate bus connects at least one concatenate memory and the plurality of DSPs serially for performing the at least one streaming-based task. At least one concatenate memory is configured to store the data for the at least one streaming-based task. At least one public bus connects the plurality of DSPs and the at least one shared memory for performing the at least one block-based tasks.
    Type: Application
    Filed: June 12, 2012
    Publication date: January 3, 2013
    Applicant: Industrial Technology Research Institute
    Inventors: Chia-Pin CHEN, Tai-Yuan Cheng, Chang-Lung Hsiao, Ren-Jr Chen
  • Publication number: 20090223320
    Abstract: A vehicular handlebar grip includes a central portion, a grip portion, and a support portion. The central portion includes a first end and a second end. The grip portion is located at one side of the central portion, extending toward a direction away from a long axis extending from the first end toward the second end. The support portion is located an opposite side of the central portion relative to the grip portion, extending toward a direction away from the long axis. Accordingly, when the vehicular handlebar grip is applied to a bicycle, the cyclist can adjust the contact area where the wrist lies against the support portion according to the cyclist's different riding postures to allow more space for movement of the palm for more comfortableness.
    Type: Application
    Filed: March 6, 2009
    Publication date: September 10, 2009
    Inventors: Chia-Pin CHEN, Kuo-Chih CHAO
  • Patent number: 7562933
    Abstract: A bicycle seat device includes a seat post having a passage formed through a seat supporting base, a lower clamp member disposed on the seat supporting base and having an oblong hole aligned with the passage of the seat supporting base, a saddle having a space formed by a casing, an upper clamp member engaged into the space of the saddle and having a pathway and one or more recesses for receiving a pole. A fastener may clamp the saddle between the clamp members. The lower clamp member includes a curved surface for rotating relative to the seat supporting base to selected angular positions.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: July 21, 2009
    Inventors: Kuo Chih Chao, Chia Pin Chen
  • Patent number: 7533480
    Abstract: A bicycle shoe sole includes a bottom portion having a number of projections extended downwardly from an outer peripheral portion and having a middle portion having no projections, and having a stud extended downwardly from the middle portion. A coupling member is integrally formed on the stud, without fasteners, by such as molding or mold injection processes, to allow the coupling member to be solidly disposed and attached on the bicycle shoe sole, and to prevent the coupling member from being disengaged from the bicycle shoe sole. The coupling member includes a front protrusion and a rear protrusion for coupling the shoe sole to foot pedals of bicycles.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: May 19, 2009
    Inventors: Kuo Chih Chao, Chia Pin Chen
  • Patent number: 7356888
    Abstract: A multi-functional retaining strap has two strap surfaces. Each strap surface is installed with attachable tapes. The multi-functional retaining strap comprises a short extending retaining strap having one end fixed to a middle section of the strap surface of the multi-functional retaining strap and another end which is not fixed; a surface of the short extending retaining strap being an attachable tape; an inner folded strap attached to one of the strap surfaces; at least one surface of the inner folded strap being an attachable tape; and an outer folded strap having two ends the inner folded strap; a gap being formed between the inner folded strap and the outer folded strap; at least one surface of the outer folded strap is an attachable tape; an auxiliary strap for prolonging the length of the short extending retaining strap.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: April 15, 2008
    Inventors: Kuo-Chih Chao, Chia-Pin Chen
  • Patent number: D591066
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: April 28, 2009
    Inventors: Kuo-Chih Chao, Chia-Pin Chen