Patents by Inventor Chia-Ping Chiang

Chia-Ping Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dissection splitting with optical proximity correction and mask rule check enforcement
    Patent number: 8381153
    Abstract: The present disclosure provides one embodiment of an integrated circuit (IC) design method. The method includes receiving an IC design layout having a plurality of main features; applying a main feature dissection to the main features of the IC design layout and generating sub-portions of the main features; performing an optical proximity correction (OPC) to the main features; performing a mask rule check (MRC) to a main feature of the IC design layout; and modifying one of the sub-portions of the main feature if the main feature fails the MRC.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: February 19, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ping Chiang, Yu-Po Tang, Ming-Hui Chih, Cheng-Kun Tsai, Wei-Long Wang, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau, Cheng-Lung Tsai, Josh J. H. Feng, Bing-Syun Yeh, Jeng-Shiun Ho, Cheng-Cheng Kuo
  • SYSTEMS AND METHODS PROVIDING ELECTRON BEAM PROXIMITY EFFECT CORRECTION
    Publication number: 20120192126
    Abstract: A method for writing a design to a material using an electron beam includes assigning a first dosage to a first polygonal shape. The first polygonal shape occupies a first virtual layer and includes a first set of pixels. The method also includes simulating a first write operation using the first polygonal shape to create the design, discerning an error in the simulated first write operation, and assigning a second dosage to a second polygonal shape to reduce the error. The second polygonal shape occupies a second virtual layer. The method further includes creating a data structure that includes the first and second polygonal shapes and saving the data structure to a non-transitory computer-readable medium.
    Type: Application
    Filed: January 21, 2011
    Publication date: July 26, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Chun Wang, Jeng-Horng Chen, Shy-Jay Lin, Chia-Ping Chiang, Cheng Kun Tsai, Wen-Chun Huang, Ru-Gun Liu
  • DISSECTION SPLITTING WITH OPTICAL PROXIMITY CORRECTION AND MASK RULE CHECK ENFORCEMENT
    Publication number: 20120072874
    Abstract: The present disclosure provides one embodiment of an integrated circuit (IC) design method. The method includes receiving an IC design layout having a plurality of main features; applying a main feature dissection to the main features of the IC design layout and generating sub-portions of the main features; performing an optical proximity correction (OPC) to the main features; performing a mask rule check (MRC) to a main feature of the IC design layout; and modifying one of the sub-portions of the main feature if the main feature fails the MRC.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ping Chiang, Yu-Po Tang, Ming-Hui Chih, Cheng-Kun Tsai, Wei-Long Wang, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau, Cheng-Lung Tsai, Josh J.H. Feng, Bing-Syun Yeh, Jeng-Shiun Ho, Cheng-Cheng Kuo