Patents by Inventor Chia-Po Lin

Chia-Po Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916314
    Abstract: A mobile device includes a housing, a first radiation element, a second radiation element, a third radiation element, a first switch element, and a second switch element. The first radiation element has a first feeding point. The second radiation element has a second feeding point. The first radiation element, the second radiation element, and the third radiation element are distributed over the housing. The first switch element is closed or open, so as to selectively couple the first radiation element to the third radiation element. The second switch element is closed or open, so as to selectively couple the second radiation element to the third radiation element. An antenna structure is formed by the first radiation element, the second radiation element, and the third radiation element.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: February 27, 2024
    Assignee: HTC Corporation
    Inventors: Cheng-Hung Lin, Szu-Po Wang, Chia-Te Chien, Chun-Chieh Wang, Kang-Ling Li, Chun-Hsien Lee, Yu-Chieh Chiu
  • Patent number: 11442210
    Abstract: A polarizer substrate includes a substrate, a reflective layer, and a metal pattern layer. The reflective layer is located on the substrate and has a transmission area and a reflective area. The metal pattern layer is located on the reflective layer and the substrate. The metal pattern layer includes a polarizer structure and a microstructure. The polarizer structure includes a plurality of grid lines overlapping the transmission area. A thickness of each of the grid lines is 200 nm to 500 nm, a width of each of the grid lines is 30 nm to 70 nm, and a distance between each adjacent two of the grid lines is 30 nm to 70 nm. The microstructure overlaps the reflective area, and a thickness of the microstructure is 20 nm to 500 nm.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: September 13, 2022
    Assignee: Au Optronics Corporation
    Inventors: Sheng-Kai Lin, Chia-Hsin Chung, Tsai-Sheng Lo, Sheng-Ming Huang, Ming-Jui Wang, Chih-Chiang Chen, Hui-Ku Chang, Cheng-Chan Wang, Chia-Po Lin, Jen-Kuei Lu
  • Patent number: 11392003
    Abstract: An active device substrate including a substrate, first metal grid wires, a first transparent conductive layer, a gate insulating layer, a semiconductor layer, a source, and a drain is provided. The first metal grid wires are located on the substrate. The first transparent conductive layer includes a scan line and a gate connected to the scan line. The scan line and/or the gate is directly connected to at least a part of the first metal grid wires. The gate insulating layer is located on the first transparent conductive layer. The semiconductor layer is located on the gate insulating layer and overlapped with the gate. The source and the drain are electrically connected to the semiconductor layer.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: July 19, 2022
    Assignee: Au Optronics Corporation
    Inventors: Cheng-Chan Wang, Tsai-Sheng Lo, Chia-Hsin Chung, Chih-Chiang Chen, Hui-Ku Chang, Sheng-Kai Lin, Chia-Po Lin, Ming-Jui Wang, Sheng-Ming Huang, Jen-Kuei Lu
  • Publication number: 20210255379
    Abstract: A polarizer substrate includes a substrate, a reflective layer, and a metal pattern layer. The reflective layer is located on the substrate and has a transmission area and a reflective area. The metal pattern layer is located on the reflective layer and the substrate. The metal pattern layer includes a polarizer structure and a microstructure. The polarizer structure includes a plurality of grid lines overlapping the transmission area. A thickness of each of the grid lines is 200 nm to 500 nm, a width of each of the grid lines is 30 nm to 70 nm, and a distance between each adjacent two of the grid lines is 30 nm to 70 nm. The microstructure overlaps the reflective area, and a thickness of the microstructure is 20 nm to 500 nm.
    Type: Application
    Filed: July 20, 2020
    Publication date: August 19, 2021
    Applicant: Au Optronics Corporation
    Inventors: Sheng-Kai Lin, Chia-Hsin Chung, Tsai-Sheng Lo, Sheng-Ming Huang, Ming-Jui Wang, Chih-Chiang Chen, Hui-Ku Chang, Cheng-Chan Wang, Chia-Po Lin, Jen-Kuei Lu
  • Publication number: 20210248341
    Abstract: A photosensitive device includes a display panel, a photosensitive element substrate, and a first quarter wave plate. The photosensitive element substrate is located on the back of the display panel. The photosensitive element substrate includes a first substrate, a plurality of first light emitting diodes, a plurality of photosensitive elements, and a first polarizer structure. The first light emitting diodes and the photosensitive elements are located on the first substrate. The first polarizer structure is located on the first light emitting diodes and the photosensitive elements. The first quarter wave plate is located between the first polarizer structure and the display panel.
    Type: Application
    Filed: July 21, 2020
    Publication date: August 12, 2021
    Applicant: Au Optronics Corporation
    Inventors: Chia-Po Lin, Tsai-Sheng Lo, Chih-Chiang Chen, Sheng-Ming Huang, Sheng-Kai Lin, Ming-Jui Wang, Chia-Hsin Chung, Hui-Ku Chang, Cheng-Chan Wang, Jen-Kuei Lu
  • Publication number: 20210247652
    Abstract: An active device substrate including a substrate, first metal grid wires, a first transparent conductive layer, a gate insulating layer, a semiconductor layer, a source, and a drain is provided. The first metal grid wires are located on the substrate. The first transparent conductive layer includes a scan line and a gate connected to the scan line. The scan line and/or the gate is directly connected to at least a part of the first metal grid wires. The gate insulating layer is located on the first transparent conductive layer. The semiconductor layer is located on the gate insulating layer and overlapped with the gate. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: July 24, 2020
    Publication date: August 12, 2021
    Applicant: Au Optronics Corporation
    Inventors: Cheng-Chan Wang, Tsai-Sheng Lo, Chia-Hsin Chung, Chih-Chiang Chen, Hui-Ku Chang, Sheng-Kai Lin, Chia-Po Lin, Ming-Jui Wang, Sheng-Ming Huang, Jen-Kuei Lu
  • Publication number: 20080160744
    Abstract: A substrate including a memory cell region and a peripheral circuit region is provided. A first dielectric layer, a first conductive layer and a mask layer are formed on the substrate. Isolation structures are formed, and the isolation structures in the memory cell region are denser than that in the peripheral circuit region. A protective layer is formed on the substrate in the second region. The mask layer in the first region is removed. A second conductive layer is formed on the substrate, wherein the protective layer has an etching selectivity the same to that of the second conductive layer. Portion of the second conductive layer and the protective layer are removed by using the isolation structures as stop layer. Portion of the isolation structures and the mask layer in the peripheral circuit region are removed. A second dielectric layer and a third conductive layer are formed on the substrate.
    Type: Application
    Filed: November 27, 2007
    Publication date: July 3, 2008
    Applicant: POWERCHIP SEMICONDUCTOR CORP.
    Inventors: Chia-Po Lin, Chien-Lung Chu
  • Patent number: 7262858
    Abstract: An apparatus accesses and processes reflection images detected from microarray biochips with sidewalls. The apparatus uses a movable system to carry an optical module and a microtiter plate to achieve relative movement in different directions, so that pattern images of all wells in the microtiter plate can be retrieved during a single scanning process. Scanned image data are further compared with pre-defined patterns by a computer program for analysis.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: August 28, 2007
    Assignee: Dr. Chip Biotechnology Incorporation
    Inventors: Chia-Po Lin, Chien-An Chen, Meng-Yu Chen, Ming-Yuan Huang, Han-Wei Wang, Chia-Hsuan Pai
  • Publication number: 20040160607
    Abstract: An apparatus accesses and processes reflection images detected from microarray biochips with sidewalls. The apparatus uses a movable system to carry an optical module and a microtitre plate to achieve relative movement in different directions, so that pattern images of all wells in the microtitre plate can be retrieved during a single scanning process. Scanned image data are further compared with pre-defined patterns by a computer program for analysis.
    Type: Application
    Filed: February 12, 2004
    Publication date: August 19, 2004
    Inventors: Chia-Po Lin, Chien-An Chen, Meng-Yu Chen, Ming-Yuan Huang, Han-Wei Wang, Chia-Hsuan Pai