Patents by Inventor Chia-Shen LIU

Chia-Shen LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105504
    Abstract: A semiconductor device includes an insulating base layer, a semiconductor layer, an insulating layer, an isolation trench and a gettering site. The semiconductor layer and the insulating layer are disposed on the insulating base layer in sequence, and the isolation trench is disposed in the semiconductor layer and passes through the insulating layer. The isolation trench includes a first cross-section, a second cross-section and a third cross-section from top to bottom. The first cross-section is higher than the bottom surface of the insulating layer, and the second cross-section and the third cross-section are lower than the bottom surface of the insulating layer. The gettering site is disposed in the semiconductor layer and in contact with the isolation trench, and the vertex of the gettering site is lower than the second cross-section.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chrong-Jung Lin, Chia-Shen Liu, Wen-Hua Wen
  • Patent number: 11942464
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20230024109
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first doped region formed in the substrate, a second doped region formed in the substrate and surrounding the first doped region, and a plurality of strip third doped regions formed in the substrate and located underneath the first doped region and the second doped region. In addition, the first doped region has a doping type which is the opposite of that of the second doped region. The strip third doped region has a doping type which is the same as that of the second doped region.
    Type: Application
    Filed: October 6, 2022
    Publication date: January 26, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shih-Chieh CHIEN, Chia-Hao LEE, Din-Ru YANG, Chia-Shen LIU
  • Publication number: 20210343837
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of strip first doped regions formed in the substrate, a plurality of strip second doped regions formed in the substrate and respectively located between the strip first doped regions, a third doped region formed in the substrate and surrounding the strip first doped regions and the strip second doped regions, and a fourth doped region formed in the substrate and located underneath the strip first doped regions, the strip second doped regions and the third doped region. The doping type of the strip first doped region is the opposite of that of the strip second doped region. The doping type of the third doped region is the same as that of the strip second doped region. The doping type of the fourth doped region is the same as that of the strip second doped region.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 4, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shih-Chieh CHIEN, Chia-Hao LEE, Din-Ru YANG, Chia-Shen LIU
  • Patent number: 10910469
    Abstract: A semiconductor device includes a substrate and a conducting structure. The substrate has a first conductivity type and includes a first isolation region, a first implant region, and a second implant region. The first isolation region is disposed along the circumference of the substrate. The first implant region has the first conductivity type, and the second implant region has a second conductivity type that is the opposite of the first conductivity type. The conducting structure is disposed on the substrate, and at least a portion of the conducting structure is located on the first isolation region.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: February 2, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hua Wen, Chia-Shen Liu, Wen-Chung Chen, Chrong-Jung Lin
  • Publication number: 20200388676
    Abstract: A semiconductor device includes a substrate and a conducting structure. The substrate has a first conductivity type and includes a first isolation region, a first implant region, and a second implant region. The first isolation region is disposed along the circumference of the substrate. The first implant region has the first conductivity type, and the second implant region has a second conductivity type that is the opposite of the first conductivity type. The conducting structure is disposed on the substrate, and at least a portion of the conducting structure is located on the first isolation region.
    Type: Application
    Filed: June 7, 2019
    Publication date: December 10, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hua WEN, Chia-Shen LIU, Wen-Chung CHEN, Chrong-Jung LIN
  • Patent number: 10600556
    Abstract: An inductor structure formed on a substrate and extending in a quadrant comprising a first domain, a second domain, a third domain and a fourth domain is provided. The inductor structure comprises an input conducting wire, an output conducting wire and a conducting wire. The conducting wire is coupled between the input conducting wire and the output conducting wire. A first portion of the conducting wire is extended from a start terminal, to the second domain, to the fourth domain, to a stop terminal. A second portion of the conducting wire is extended from the start terminal, to the third domain, to the first domain, to the stop terminal.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: March 24, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventor: Chia-Shen Liu
  • Publication number: 20190206609
    Abstract: An inductor structure formed on a substrate and extending in a quadrant comprising a first domain, a second domain, a third domain and a fourth domain is provided. The inductor structure comprises an input conducting wire, an output conducting wire and a conducting wire. The conducting wire is coupled between the input conducting wire and the output conducting wire. A first portion of the conducting wire is extended from a start terminal, to the second domain, to the fourth domain, to a stop terminal. A second portion of the conducting wire is extended from the start terminal, to the third domain, to the first domain, to the stop terminal.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 4, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventor: Chia-Shen LIU