Abstract: A method of forming a conductive stud is provided. The method includes providing a substrate which has an upper surface and an opening. The opening exposes a portion of a vertical memory device. A conductive layer is formed over the substrate to fill the opening. A chemical mechanical polishing is performed on the conductive layer to form a conductive stud having an upper surface substantially lower than the upper surface of the substrate.

Abstract: A method for forming a self-aligned contact on a semiconductor substrate provided with a plurality of field-effect transistors. The method includes the steps of forming a first insulating layer that includes a nitride along a profile of a gate structure and a junction region, forming a temporary layer that has a doped oxide on the first insulting layer, removing a portion of the temporary layer by performing a selective etch of the oxide with a mask while leaving a plug portion of the temporary layer over the junction region, forming a second insulting layer that has an undoped oxide in a region where the portion of the temporary layer is removed, removing the plug portion by performing a selective etch of the undoped oxide to form a contact hole, removing a portion of the first insulating layer at a bottom of the contact hole, and forming a conductive contact ins the contact hole.

Abstract: A method for manufacturing a single-ended buried strap used in semiconductor devices is disclosed. According to the present invention, a trench capacitor structure is formed in a semiconductor substrate, wherein the trench capacitor structure has a contact surface lower than a surface of the semiconductor substrate such that a recess is formed. Then, an insulative layer is formed on a sidewall of the recess. Next, impurities are implanted into a portion of the insulative layer, and the impurity-containing insulative layer is thereafter removed such that at least a portion of the contact surface and a portion of sidewall of the recess are exposed. A buried strap is sequentially formed on the exposed sidewall of the recess to be in contact with the exposed contact surface.

Abstract: Afin-type trench capacitor structure includes a buried plate diffused into a silicon substrate. The buried plate, which surrounds a bottle-shaped lower portion of the trench capacitor structure, is electrically connected to an upwardly extending annular poly electrode, thereby enabling the buried plate and the annular poly electrode to constitute a large-area capacitor electrode of the trench capacitor structure. A capacitor storage node consisting of a surrounding conductive layer, a central conductive layer and a collar conductive layer encompasses the upwardly extending annular poly electrode. A first capacitor dielectric layer isolates the capacitor storage node from the buried plate. A second capacitor dielectric layer and a third capacitor dielectric layer isolate the upwardly extending annular poly electrode from the capacitor storage node.

Abstract: Disclosed is a method for forming a bit line contact hole/contact structure. The method of the present invention includes steps of providing a substrate; forming a plurality of word line structures on the substrate; forming a doped dielectric layer on the substrate having the word line structures formed thereon; defining a position for forming a bit line contact hole; removing the doped dielectric layer other than the portion at the position for forming the bit line contact hole; forming a non-doped dielectric layer on the substrate having the word line structures and residual doped dielectric layer formed thereon; removing the residual doped dielectric layer by using an etchant with a high selectivity for doped dielectric layer/non-doped dielectric layer to form a bit line contact hole; and filling the bit line contact hole with conductive material to form a bit line contact structure.

Abstract: Disclosed is a method for forming a bit line contact hole/contact structure. The method of the present invention comprises steps of providing a substrate; forming a pluarality of word line structures on the substrate; forming a doped dielectric layer on the substrate having the word line structures formed thereon; defining a position for forming a bit line contact hole; removing the doped dielectric layer other than the portion at the position for forming the bit line contact hole; forming a non-doped dielectric layer on the substrate having the word line structures and residual doped dielectric layer formed thereon; removing the residual doped dielectric layer by using an etchant with a high selectivity for doped dielectric layer/non-doped dielectric layer to form a bit line contact hole; and filling the bit line contact hole with conductive material for form a bit line contact structure.

Abstract: A method for forming a deep trench capacitor mainly utilizes a liquid phase deposition (LPD) oxide to form a collar oxide layer in the trench, followed by forming a conductive layer serving as an upper electrode of the deep trench capacitor, thereby avoiding collar oxide residue in the conductive layer and thus forming good electrical connection. And, the method of the present invention does not need a dry etch to remove the unnecessary collar oxide layer such that the process can be simplified.

Abstract: A method for forming a self-aligned contact on a semiconductor substrate provided with a plurality of field-effect transistors. The method comprises the steps of forming a first insulating layer comprising a nitride along a profile of a gate structure and a junction region, forming a temporary layer comprising a doped oxide on the first insulating layer, removing a portion of the temporary layer by performing a selective etch of the oxide with a mask while leaving a plug portion of the temporary layer over the junction region, forming a second insulating layer comprising an undoped oxide in a region where the portion of the temporary layer is removed, removing the plug portion by performing a selective etch of the undoped oxide to form a contact hole, removing a portion of the first insulating layer at a bottom of the contact hole, and forming a conductive contact in the contact hole.

Abstract: A method for manufacturing a single-ended buried strap used in semiconductor devices is disclosed. According to the present invention, a trench capacitor structure is formed in a semiconductor substrate, wherein the trench capacitor structure has a contact surface lower than a surface of the semiconductor substrate such that a recess is formed. Then, an insulative layer is formed on a sidewall of the recess. Next, impurities are implanted into a portion of the insulative layer, and the impurity-containing insulative layer is thereafter removed such that at least a portion of the contact surface and a portion of sidewall of the recess are exposed. A buried strap is sequentially formed on the exposed sidewall of the recess to be in contact with the exposed contact surface.

Abstract: Afin-type trench capacitor structure includes a buried plate diffused into a silicon substrate. The buried plate, which surrounds a bottle-shaped lower portion of the trench capacitor structure, is electrically connected to an upwardly extending annular poly electrode, thereby enabling the buried plate and the annular poly electrode to constitute a large-area capacitor electrode of the trench capacitor structure. A capacitor storage node consisting of a surrounding conductive layer, a central conductive layer and a collar conductive layer encompasses the upwardly extending annular poly electrode. A first capacitor dielectric layer isolates the capacitor storage node from the buried plate. A second capacitor dielectric layer and a third capacitor dielectric layer isolate the upwardly extending annular poly electrode from the capacitor storage node.

Abstract: A method of forming a conductive stud is provided. The method includes providing a substrate which has an upper surface and an opening. The opening exposes a portion of a vertical memory device. A conductive layer is formed over the substrate to fill the opening. A chemical mechanical polishing is performed on the conductive layer to form a conductive stud having an upper surface substantially lower than the upper surface of the substrate.

Abstract: A method for forming a deep trench capacitor mainly utilizes a liquid phase deposition (LPD) oxide to form a collar oxide layer in the trench, followed by forming a conductive layer serving as an upper electrode of the deep trench capacitor, thereby avoiding collar oxide residue in the conductive layer and thus forming good electrical connection. And, the method of the present invention does not need a dry etch to remove the unnecessary collar oxide layer such that the process can be simplified.