Patents by Inventor Chia-Shun Yeh

Chia-Shun Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152671
    Abstract: A violation checking method includes generating a violation log report for a design, classifying violation logs in the violation log report into high-risk logs and low-risk logs by a machine learning model, reviewing the high-risk logs, and modifying the design if at least one bug is identified in the high-risk logs.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chi-Ming Lee, Chung-An Wang, Cheok Yan Goh, Chia-Cheng Tsai, Chien-Hsin Yeh, Chia-Shun Yeh, Chin-Tang Lai
  • Publication number: 20230153505
    Abstract: Electronic design automation (EDA) of the present disclosure logically places components of the electronic circuitry onto an electronic design real estate to determine an architectural design placement for the electronic circuitry. The EDA evaluates a metaheuristic algorithm starting with an initial placement of components of the electronic circuitry onto the electronic design real estate to provide multiple possible placements for placing these components of the electronic circuitry onto the electronic design real estate. The EDA utilizes the multiple possible placements of the metaheuristic algorithm to train one or more probabilistic functions of a model-based reinforcement learning (RL) algorithm. The EDA evaluates the model-based RL algorithm utilizing the one or more probabilistic functions to determine the architectural design placement.
    Type: Application
    Filed: September 6, 2022
    Publication date: May 18, 2023
    Applicant: MediaTek Inc.
    Inventors: Wei-Hao CHANG, Kai-En YANG, Kao-I CHAO, Yu-Hsun CHEN, Cheng-Feng CHIANG, Yen Min TSAI, Sau Loong LOW, Chia-Shun YEH, Bun Suan HENG, Chia-Yu TSAI, Chin-Tang LAI, Hung-Hao SHEN
  • Publication number: 20230144389
    Abstract: An artificial intelligence (AI)-based constrained random verification (CRV) method for a design under test (DUT) includes: receiving a series of constraints; obtaining a limited constraint range according to the series of constraints; generating a series of stimuli according to the limited constraint range; and verifying the DUT by the series of stimuli; wherein at least one of the step of obtaining the limited constraint range according to the series of constraints and the step of generating the series of stimuli according to the limited constraint range employs an AI algorithm.
    Type: Application
    Filed: October 19, 2022
    Publication date: May 11, 2023
    Applicant: MEDIATEK INC.
    Inventors: Chung-An Wang, Chiao-Hua Tseng, Chia-Cheng Tsai, Tung-Yu Lee, Yen-Her Chen, Chien-Hsin Yeh, Chia-Shun Yeh, Chin-Tang Lai
  • Publication number: 20220138570
    Abstract: A system performs the operations of a neural network agent and a circuit simulator for analog circuit sizing. The system receives an input indicating a specification of an analog circuit and design parameters. The system iteratively searches a design space until a circuit size is found to satisfy the specification and the design parameters. In each iteration, the neural network agent calculates measurement estimates for random sample generated in a trust region, which is a portion of the design space. Based on the measurement estimate, the system identifies a candidate size that optimizes a value metric. The circuit simulator receives the candidate size and generates a simulation measurement. The system calculates updates to weights of the neural network agent and the trust region for a next iteration based on, at least in part, the simulation measurement.
    Type: Application
    Filed: October 6, 2021
    Publication date: May 5, 2022
    Inventors: Chia-Yu Tsai, Hung-Hao Shen, Chen-Feng Chiang, Chung-An Wang, Yiju Ting, Chia-Shun Yeh, Chin-Tang Lai, Feng-Ming Tsai, Kai-En Yang
  • Patent number: 7487120
    Abstract: A new method and system is provided for the interfacing with, replenishing and otherwise managing of a consignment inventory. Input data that address the content of the consignment inventory are supplied. Business flow is controlled be setting a periodical target of material released from the consignment inventory, by setting periodically sock limitations of high, low and an adequate supply of materials in the consignment inventory, and by providing an intelligent dispatching mechanism for releasing materials from the consignment inventory. In interface with the vendor keeps the vendor informed of the level of materials on hand. The method and system of the invention is supported and implemented using computed controlled data base storage.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: February 3, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Shun Yeh, Chung-Chieh Ko, Tsan-Tu Ko, Chung-Ming Tai, Yi-Sung Lin
  • Publication number: 20040133498
    Abstract: A system and method for electronic quotation collaboration over the Internet. It is integrated with the corporate purchasing computer system and buyers can be automatically and periodically notified of an optimum time to issue a Request For Quotations for specific needed materials. Buyers can then easily post this Request for Quotations on a private, secure corporate Web site that acts as an electronic marketplace where buyers and related vendors can negotiate quotations. Related vendors are automatically notified by e-mail of the Request For Quotations and asked to respond on the Web site. After quotation negotiation, the system can generate a price analysis report using past quotation information. Buyers and managers can then use this report in their decision-making process. Quotations are automatically updated. Related information records in the corporate computer system are automatically updated as well. The entire process is automatically logged and easily tracked.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 8, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Chia-Shun Yeh, Shiao-Jong Hu, Ing-Chin Tsen, Sing-Yi Lon