Patents by Inventor Chia-Ta Lin

Chia-Ta Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138063
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.
    Type: Application
    Filed: November 15, 2022
    Publication date: April 25, 2024
    Applicant: Unimicron Technology Corp.
    Inventors: Ping-Tsung Lin, Kai-Ming Yang, Chia-Yu Peng, Pu-Ju Lin, Cheng-Ta Ko
  • Publication number: 20240138059
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 25, 2024
    Applicant: Unimicron Technology Corp.
    Inventors: Kai-Ming Yang, Chia-Yu Peng, Cheng-Ta Ko, Pu-Ju Lin
  • Patent number: 11961890
    Abstract: A semiconductor device includes a semiconductor layer and a gate structure on the semiconductor layer. The gate structure includes a multi-stepped gate dielectric on the semiconductor layer and a gate electrode on the multi-stepped gate dielectric. The multi-stepped gate dielectric includes a first gate dielectric segment having a first thickness and a second gate dielectric segment having a second thickness that is less than the first thickness.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Fu Lin, Chia-Ta Hsieh, Tsung-Hao Yeh
  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Publication number: 20100332832
    Abstract: A two-factor authentication system is provided for securing online transactions. In the two-factor authentication system, a transaction server provides online transaction services. A mobile communication device receives short messages. A client computing device applies a first authentication function to communicate with the transaction server, receives, via short messages, a first authentication code used to authenticate the transaction server, and applies a second authentication function to generate a second authentication code. Next, the transaction server authenticates the client computing device with the second authentication function and second authentication code.
    Type: Application
    Filed: September 28, 2009
    Publication date: December 30, 2010
    Applicant: Institute for Information Industry
    Inventors: Jui-Ming WU, Jia-Jum Hung, Chia-Ta Lin, Hsin-Yi Lai