Patents by Inventor Chia Tai Lin

Chia Tai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making a FinFET device
    Patent number: 9190496
    Abstract: A method for fabricating a fin-type field-effect transistor (FinFET) device includes receiving a precursor. The precursor has a plurality of fins over a substrate and a dielectric layer filling in a space between each of fins and extending above the fins. The method also includes forming a patterned hard mask layer having an opening over the dielectric layer, etching the dielectric layer through the opening to form a trench with vertical profile. A subset of the fins is exposed in the trench. The method also includes performing an isotropic dielectric etch to enlarge the trench in a horizontal direction. The method also includes performing an anisotropic etch to recess the subset of fins in the trench and performing an isotropic fin etch to etch the recessed subset of fins.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: November 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chia-Jen Chen, Chao-Cheng Chen
  • Method Of Making a FinFET Device
    Publication number: 20150206954
    Abstract: A method for fabricating a fin-type field-effect transistor (FinFET) device includes receiving a precursor. The precursor has a plurality of fins over a substrate and a dielectric layer filling in a space between each of fins and extending above the fins. The method also includes forming a patterned hard mask layer having an opening over the dielectric layer, etching the dielectric layer through the opening to form a trench with vertical profile. A subset of the fins is exposed in the trench. The method also includes performing an isotropic dielectric etch to enlarge the trench in a horizontal direction. The method also includes performing an anisotropic etch to recess the subset of fins in the trench and performing an isotropic fin etch to etch the recessed subset of fins.
    Type: Application
    Filed: January 23, 2014
    Publication date: July 23, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chia Tai Lin
  • Semiconductor Fin Structures and Methods for Forming the Same
    Publication number: 20130277759
    Abstract: A device includes a semiconductor substrate, and a plurality of semiconductor fins parallel to each other, wherein the plurality of semiconductor fins is a portion of the semiconductor substrate. A Shallow Trench Isolation (STI) region is on a side of the plurality of semiconductor fins. The STI region has a top surface and a non-flat bottom surface, wherein the plurality of semiconductor fins is over the top surface of the STI region.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 24, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ryan Chia-Jen Chen, Yih-Ann Lin, Chia Tai Lin, Chao-Cheng Chen