Patents by Inventor Chia Tsai
Chia Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11970116Abstract: An operating method of an optical system in a vehicle is provided. The optical system includes a display device. The display device includes a display panel and a plurality of light emitting units. The light emitting units are configured to emit a light to the display panel. The operating method includes the following steps. An emphasized portion of an object is determined. An image corresponding to the emphasized portion is displayed by the display device by adjusting a light intensity of at least a portion of the light emitted from the light emitting units.Type: GrantFiled: May 11, 2022Date of Patent: April 30, 2024Assignee: Innolux CorporationInventors: Yu-Chia Huang, Tsung-Han Tsai, Kuan-Feng Lee
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Patent number: 11974403Abstract: A method for manufacturing an electronic device includes the steps of providing a flexible substrate, forming an electric circuit layer on the flexible substrate at an elevated temperature, and enhancing a transmittance of the flexible substrate after forming the electric circuit layer.Type: GrantFiled: August 19, 2021Date of Patent: April 30, 2024Assignee: InnoLux CorporationInventors: Yu-Chia Huang, Kuan-Feng Lee, Tsung-Han Tsai
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Publication number: 20240136344Abstract: A display device includes a substrate, at least one light emitting unit bound on the substrate, a transparency controllable unit disposed on the substrate, and an integrated circuit unit overlapped with the substrate. The integrated circuit unit includes a semiconducting structure and a conductive structure overlapped with the semiconducting structure. The integrated circuit unit is electrically connected to the at least one light emitting unit and the transparency controllable unit.Type: ApplicationFiled: September 17, 2023Publication date: April 25, 2024Applicant: InnoLux CorporationInventors: Jia-Yuan CHEN, Yu-Chia HUANG, Tsung-Han TSAI, Kuan-Feng LEE
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Patent number: 11962847Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.Type: GrantFiled: November 9, 2022Date of Patent: April 16, 2024Assignee: MEDIATEK INC.Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
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Patent number: 11961444Abstract: The disclosure provides a transparent display device including a display panel. The display panel includes a display area, a non-display area, and a plurality of pixels. The non-display area is adjacent to the display area. The plurality of pixels are disposed in the display area. A difference between a transmittance of the display area and a transmittance of the non-display area is less than 30% of the transmittance of the display area.Type: GrantFiled: February 3, 2023Date of Patent: April 16, 2024Assignee: Innolux CorporationInventors: Yu-Chia Huang, Yuan-Lin Wu, Tsung-Han Tsai, Kuan-Feng Lee
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Patent number: 11961770Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.Type: GrantFiled: November 4, 2021Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
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Publication number: 20240120314Abstract: Methods of ion implantation combined with annealing using a pulsed laser or a furnace for cutting substrate in forming semiconductor devices and semiconductor devices including the same are disclosed. In an embodiment, a method includes forming a transistor structure of a device on a first semiconductor substrate; forming a front-side interconnect structure over a front side of the transistor structure; bonding a carrier substrate to the front-side interconnect structure; implanting ions into the first semiconductor substrate to form an implantation region of the first semiconductor substrate; and removing the first semiconductor substrate. Removing the first semiconductor substrate includes applying an annealing process to separate the implantation region from a remainder region of the first semiconductor substrate. The method also includes forming a back-side interconnect structure over a back side of the transistor structure.Type: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Inventors: Huicheng Chang, Jyh-Cherng Sheu, Chen-Fong Tsai, Yun Chen Teng, Han-De Chen, Yee-Chia Yeo
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Publication number: 20240113128Abstract: High voltage three-dimensional devices having dielectric liners and methods of forming high voltage three-dimensional devices having dielectric liners are described. For example, a semiconductor structure includes a first fin active region and a second fin active region disposed above a substrate. A first gate structure is disposed above a top surface of, and along sidewalls of, the first fin active region. The first gate structure includes a first gate dielectric, a first gate electrode, and first spacers. The first gate dielectric is composed of a first dielectric layer disposed on the first fin active region and along sidewalls of the first spacers, and a second, different, dielectric layer disposed on the first dielectric layer and along sidewalls of the first spacers. The semiconductor structure also includes a second gate structure disposed above a top surface of, and along sidewalls of, the second fin active region.Type: ApplicationFiled: December 13, 2023Publication date: April 4, 2024Inventors: Walid M. HAFEZ, Jeng-Ya D. YEH, Curtis TSAI, Joodong PARK, Chia-Hong JAN, Gopinath BHIMARASETTI
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Publication number: 20240113071Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
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Publication number: 20240114487Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE receives, in a first slot and from a base station, a first signal that is a downlink data signal in a first frequency resource allocation. The UE communicates, with the base station, a second signal in a second slot. A configured time gap between the first slot and the second slot is according to a comparison of the first frequency resource allocation and a second frequency resource allocation.Type: ApplicationFiled: September 19, 2023Publication date: April 4, 2024Inventors: Chiou-Wei TSAI, Wei-De WU, Yi-Chia LO, Tien-Shin HO
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Publication number: 20240108820Abstract: An atomization device and a method of predicting atomization time for the same are provided. The atomization device includes a control module, an atomization module and a breathing sensing module. The method includes: configuring the breath sensing module to detect inhalations of a user using the atomization device, so as to generate initial breath data correspondingly; and configuring the control module to perform: comparing inhalation data of the initial breath data with a valid inhalation standard to obtain valid inhalation data and filter noise; statistically analyzing the valid inhalation data to generate a predicted value of inhalation time; calculating an atomization time according to the predicted value of the inhalation time; and generating a driving signal to drive the atomization module to perform atomization according to the atomization time.Type: ApplicationFiled: September 25, 2023Publication date: April 4, 2024Inventors: CHIEN-SHEN TSAI, SHIH-CHAO LUO, YUAN-MING HSU, CHUN-CHIA JUAN
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Patent number: 11942451Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
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Patent number: 11939432Abstract: Synthetic amino acid-modified polymers and methods of making the same and using the same are disclosed. The synthetic amino acid-modified polymers possess distinct thermosensitive, improved water-erosion resistant, and enhanced mechanical properties, and are suitable of reducing or preventing formation of postoperative tissue adhesions. Additionally, the amino acid-modified polymers can also be used as a vector to deliver pharmaceutically active agents.Type: GrantFiled: April 23, 2021Date of Patent: March 26, 2024Assignee: PROVIEW-MBD BIOTECH CO., LTD.Inventors: Yu-Chia Chang, Yunn-Kuen Chang, Wen-Yen Huang, Ging-Ho Hsiue, Hsieh-Chih Tsai, Shuian-Yin Lin, Nai-Sheng Hsu, Tzu-Yu Lin
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Patent number: 11939431Abstract: The present invention relates to a composition comprising an amino acid-modified polymer, a carboxypolysaccharide, and may further include a metal ion for anti-adhesion and vector application. More specifically, the invention relates to a thermosensitive composition having enhanced mechanical and improved water-erosion resistant properties for efficiently preventing tissue adhesions and can serve as a vector with bio-compatible, bio-degradable/absorbable, and in-vivo sustainable properties.Type: GrantFiled: April 23, 2021Date of Patent: March 26, 2024Assignee: PROVIEW-MBD BIOTECH CO., LTD.Inventors: Yu-Chia Chang, Yunn-Kuen Chang, Wen-Yen Huang, Ging-Ho Hsiue, Hsieh-Chih Tsai, Shuian-Yin Lin, Nai-Sheng Hsu, Tzu-Yu Lin
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Patent number: 11942007Abstract: A transparent display device is provided. The transparent display device includes a display unit having a circuit area and a transparent area. The display unit includes a plurality of signal lines located in the circuit area, a plurality of pixel circuits electrically connected to the signal lines and located in the circuit area, a plurality of light-emitting elements driven by the pixel circuits and located in the circuit area, and an encapsulation layer located in the circuit area and the transparent area. A first thickness of the encapsulation layer located in the circuit area is different from a second thickness of the encapsulation layer located in the transparent area.Type: GrantFiled: November 4, 2022Date of Patent: March 26, 2024Assignee: INNOLUX CORPORATIONInventors: Yu-Chia Huang, Tsung-Han Tsai, Kuan-Feng Lee
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Publication number: 20240095755Abstract: A hybrid method for green intelligent manufacturing (GiM) combines the carbon reduction and the energy saving into the intelligent manufacturing based Industry 4.1 cloud platform. GiM assists companies to achieve the goal of net zero transition and help them advance to Industry 4.2 as soon as possible by simultaneously taking carbon footprint and energy issues into account. GiM collects large volumes of essential data (including carbon footprint) via cyber physical agents (CPAs), and sends them to two critical services of carbon management and intelligent energy management system (iEMS) deployed on the cloud platform. The two critical services optimize the energy dispatch schedule by strictly following the requirements of energy saving, carbon reduction, and net zero. Then, the state of zero defects of intelligent manufacturing achieved in Industry 4.1 can be upgraded to net zero of GiM in Industry 4.2.Type: ApplicationFiled: November 1, 2022Publication date: March 21, 2024Inventors: Hao TIENG, Fan-Tien CHENG, Ting-Chia OU, Tsung-Han TSAI, Yu-Yong LI
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Publication number: 20240097444Abstract: Embodiments of the present invention provide a hybrid system and method for distributed virtual power plants integrated intelligent net zero. In this method, a cyber physical agent (CPA) is utilized to collect a carbon emission information and an energy management information, and then an artificial intelligence (AI) optimization model of an intelligent central dispatch platform is utilized to obtain a power dispatch manner of the distributed virtual power plants based on the carbon emission information and the energy management information, such that the power dispatch manner of the distributed virtual power plants meets the requirements of enterprise economic benefits and net zero carbon emissions at the same time.Type: ApplicationFiled: November 1, 2022Publication date: March 21, 2024Inventors: Ting-Chia OU, Hao TIENG, Fan-Tien CHENG, Tsung-Han TSAI, Yu-Yong LI
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Publication number: 20240094052Abstract: An optical module is disclosed. The optical module includes a carrier, an optical emitter disposed over the carrier, and a monitor disposed over the carrier and configured to adjust a property of a first light emitted from the optical emitter.Type: ApplicationFiled: September 20, 2022Publication date: March 21, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Kuo Sin HUANG, Tien-Chia LIU, Ko-Fan TSAI, Cheng-Te CHOU, Yan-Te CHOU
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Publication number: 20240082163Abstract: A metformin tablet, a metformin tablet for relieving pain and reducing inflammation, and a manufacturing method thereof. The tablet for relieving pain and reducing inflammation comprises: a filler, a diluent, an excipient, a binder, a slow-release agent, a sweetener, and a medicinal powder; the excipient comprises: at least one of PVP, PEG, and polymer; the medicinal powder comprises: at least one of metformin and the excipient. The metformin tablet comprises: a hollow part, a thick colloidal layer formed on an outer side of the hollow part, and a powder colloidal layer formed on an outer side of the thick colloidal layer. The tablet for relieving pain and reducing inflammation comprises: a thick colloidal layer, a powder colloidal layer formed on an outer side of the thick colloidal layer, and a hollow part located at a center of the tablet and on an inner side of the thick colloidal layer.Type: ApplicationFiled: September 8, 2022Publication date: March 14, 2024Inventors: CHAO-YI CHEN, CHIH-CHIA TSAI
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Patent number: 11927312Abstract: The disclosure provides an electronic device, including a circuit board, multiple semiconductor components, a first light reflecting structure, and a second light reflecting structure. The circuit board includes a substrate, and the substrate may have a first surface and at least one side surface. The multiple semiconductor components are disposed on the first surface. The first light reflecting structure is disposed on the first surface. The second light reflecting structure is disposed on the first surface and the at least one side surface.Type: GrantFiled: April 18, 2022Date of Patent: March 12, 2024Assignee: Innolux CorporationInventors: Chin-Chia Huang, Chieh-Ying Chen, Jia-Huei Lin, Chin-Tai Hsu, Tzu-Chien Huang, Fu-Sheng Tsai