Patents by Inventor Chia-Wei Chen
Chia-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240239059Abstract: A molding method of a support rod that first passing a plurality of long fibers through a resin bath for impregnating with resin, then passing the plurality of long fibers impregnated with resin through a bundling hole of a position-constrained vertical plate on a machine to preliminarily form a bundle end; providing a coating layer on the machine, one end of the coating layer obliquely passes through a guiding portion on the position-constrained vertical plate to downwardly contact the bundle end; then placing the one end of the coating layer and the bundle end into a mold cavity of a mold at the same time to form a long rod body; and then cutting the long rod body into multi-segment support rods through a cutting process.Type: ApplicationFiled: May 17, 2023Publication date: July 18, 2024Inventors: Che-Yuan Liu, Chang-Hsing Lee, Ming-Chuan Liu, Zhao-Xu Lai, Pen-Chien Yu, Shu-Fen Wang, Chia-Chang Hsu, Ren-Wei Tsai, Zong-You Chen, Da-Chun Chien
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Publication number: 20240240210Abstract: Provided is a recombinant microorganism including at least two genes for producing itaconic acid and its derived monomers, and the at least two genes are located on the same expression vector. The at least two genes include one encoding cis-aconitic acid decarboxylase and the other one encoding aconitase, and the genome of the recombinant microorganism includes a gene encoding the molecular chaperone protein GroELS. Also provided is a method for producing itaconic acid by using the microorganism.Type: ApplicationFiled: March 23, 2023Publication date: July 18, 2024Inventors: I-Son NG, Jo-Shu CHANG, Chuan-Chieh HSIANG, Yeong-Chang CHEN, Yu-Chiao LIU, Chia-Wei TSAI
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Patent number: 12040235Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.Type: GrantFiled: July 21, 2022Date of Patent: July 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Da-Yuan Lee, Jian-Hao Chen, Chien-Hao Chen, Kuo-Feng Yu, Chia-Wei Chen, Chih-Yu Hsu
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Patent number: 12041760Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.Type: GrantFiled: August 9, 2022Date of Patent: July 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
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Patent number: 12029012Abstract: A fluid immersion cooling system includes a fluid tank that contains a layer of a dual-phase coolant fluid and one or more layers of single-phase coolant fluids. The dual-phase and single-phase coolant fluids are immiscible, with the dual-phase coolant fluid having a lower boiling point and higher density than a single-phase coolant fluid. A substrate of an electronic system is submerged in the tank such that high heat-generating components are immersed at least in the layer of the dual-phase coolant fluid. Heat from the components is dissipated to the dual-phase coolant fluid to generate vapor bubbles of the dual-phase coolant fluid. The vapor bubbles rise to a layer of a single-phase coolant fluid that is above the layer of the dual-phase coolant fluid. The vapor bubbles condense to droplets of the dual-phase coolant fluid. The droplets fall down into the layer of the dual-phase coolant fluid.Type: GrantFiled: July 23, 2021Date of Patent: July 2, 2024Assignee: Super Micro Computer, Inc.Inventors: Yueh Ming Liu, Yu Hsiang Huang, Yu Chuan Chang, Tan Hsin Chang, Hsiao Chung Chen, Chia-Wei Chen, Chih-Ta Chen, Cheng-Hung Lin, Ming-Te Hsu
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Patent number: 12022643Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.Type: GrantFiled: September 29, 2020Date of Patent: June 25, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
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Patent number: 11996484Abstract: A semiconductor device includes a substrate, two source/drain features over the substrate, channel layers connecting the two source/drain features, and a gate structure wrapping around each of the channel layers. Each of the two source/drain features include a first epitaxial layer, a second epitaxial layer over the first epitaxial layer, and a third epitaxial layer on inner surfaces of the second epitaxial layer. The channel layers directly interface with the second epitaxial layers and are separated from the third epitaxial layers by the second epitaxial layers. The first epitaxial layers include a first semiconductor material with a first dopant. The second epitaxial layers include the first semiconductor material with a second dopant. The second dopant has a higher mobility than the first dopant.Type: GrantFiled: May 13, 2021Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Hao Lin, Chih-Hsuan Chen, Chia-Hao Pao, Chih-Chuan Yang, Chih-Yu Hsu, Hsin-Wen Su, Chia-Wei Chen
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Publication number: 20240147673Abstract: A cooling device for rack servers and cooling method for rack servers are provided. The cooling device for rack servers includes an environmental temperature sensor, a humidity sensor, a coolant temperature sensor, an electronic valve, and a controller. The controller is configured to compute a dew point temperature according to an ambient temperature and an ambient humidity sensed by the environmental temperature sensor and the humidity sensor, compute a temperature difference between a outlet-liquid temperature of a coolant and the dew point temperature, and control an opening of the electronic valve according to the temperature difference to adjust a liquid flow of the coolant outputted, such that the outlet-liquid temperature dynamically changes following the adjustment of the liquid flow.Type: ApplicationFiled: February 28, 2023Publication date: May 2, 2024Inventors: Chia-Wei CHEN, Kun-Chieh LIAO, Yueh-Ming LIU
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Publication number: 20240147665Abstract: A precooling device integrated with a cooling distribution unit and a server liquid cooling system are provided. The precooling device includes a liquid cooling row, an adapter assembly, and a cooling distribution unit. The adapter assembly includes a flow joining row and a flow distribution row. The cooling distribution unit supplies a refrigerant from an interior thereof, and includes an outlet and an inlet communicating with the interior. The outlet communicates with the flow distribution row of the adapter assembly to deliver the refrigerant for heat exchange. The refrigerant being performed the heat exchange returns to the liquid cooling row through the flow joining row of the adapter assembly for precooling, and then returns from the liquid cooling row to the cooling distribution unit through the inlet. The refrigerant is precooled before returning to the cooling distribution unit.Type: ApplicationFiled: February 28, 2023Publication date: May 2, 2024Inventors: Chia-Wei CHEN, Kun-Chieh LIAO, Yueh-Ming LIU
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Publication number: 20240077479Abstract: A detection system and method for the migrating cell is provided. The system is configured to detect a migrating cell combined with an immunomagnetic bead. The system includes a platform, a microchannel, a magnetic field source, a coherent light source and an optical sensing module. The microchannel is configured to allow the migrating cell to flow in it along a flow direction. The magnetic field source is configured to provide magnetic force to the migrating cell combined with the immunomagnetic bead. The magnetic force includes at least one magnetic force component and the magnetic force component is opposite to the flow direction of the microchannel. The coherent light source is configured to provide the microchannel with the coherent light. The optical sensing module is configured to receive the interference light caused by the coherent light being reflected by the sample inside the microchannel.Type: ApplicationFiled: August 10, 2023Publication date: March 7, 2024Applicant: DeepBrain Tech. IncInventors: Han-Lin Wang, Chia-Wei Chen, Yao-Wen Liang, Ting-Chun Lin, Yun-Ting Kuo, You-Yin Chen, Yu-Chun Lo, Ssu-Ju Li, Ching-Wen Chang, Yi-Chen Lin
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Publication number: 20240064936Abstract: A fluid immersion cooling system has a fluid tank containing a hydrocarbon dielectric fluid as a coolant fluid. One or more components of an electronic system is immersed in the coolant fluid. A gas cylinder contains a non-flammable, compressed filling gas. The temperature of the coolant fluid is monitored during operation of the electronic system. The filling gas is released from the gas cylinder and into the fluid tank when the temperature of the coolant fluid rises to a trigger temperature that is set based on the flash point of the coolant fluid. The filling gas covers a surface of the coolant fluid to block oxygen from interacting with vapors of the coolant fluid to prevent combustion.Type: ApplicationFiled: August 19, 2022Publication date: February 22, 2024Inventors: Yueh-Ming LIU, Hsiao-Chung CHEN, Chia-Wei CHEN, Yu-Hsiang HUANG, Chia-Che CHANG, Hua-Kai TONG, Tan-Hsin CHANG, Yu-Chuan CHANG, Ming-Yu CHEN, Yu-Yen HSIUNG, Kun-Chieh LIAO
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Publication number: 20240030155Abstract: The present invention provides a wafer level chip scale package (WLCSP) unit; the WLCSP unit includes a die, a dielectric layer, and a bottom metal layer; the die has a substrate and an active surface; multiple pads are mounted on the active surface, and a soldering layer is mounted on a surface of each of the pads; the dielectric layer covers an upper part of four lateral surfaces of the die, exposing a lower part of the four lateral surfaces of the die; the bottom metal layer is mounted on a bottom surface of the substrate; the bottom metal layer protects a bottom surface of the dies, dissipates heat generated by the dies, and also protects the dies from external electromagnetic interferences (EMI).Type: ApplicationFiled: August 10, 2022Publication date: January 25, 2024Applicant: PANJIT INTERNATIONAL INC.Inventors: Chung-Hsiung HO, Chi-Hsueh LI, Yu-Ming HSU, Yung-Hui WANG, Chia-Wei CHEN
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Publication number: 20230411220Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.Type: ApplicationFiled: July 24, 2023Publication date: December 21, 2023Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Cheng Hong Yang, Shih-Hao Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
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Patent number: 11839048Abstract: A pole mount system has an enclosure, an enclosure mounting assembly, and a clamp system. The enclosure mounting assembly is affixed to the exterior of the enclosure. The clamp system grips the pole. The enclosure mounting assembly and the clamp system have complementary fastening structures to secure the enclosure to the pole.Type: GrantFiled: September 29, 2020Date of Patent: December 5, 2023Assignee: SUPER MICRO COMPUTER, INC.Inventors: Chia-Wei Chen, Tienen Chao
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Publication number: 20230389256Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
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Publication number: 20230386325Abstract: A driving assistance system and a driving assistance method are provided. The driving assistance system includes a plurality of image capturing devices, a congestion calculation module, and a determination module. The image capturing devices capture a plurality of regional images of a plurality of road sections of the target lane. The congestion calculation module calculates a plurality of congestion levels corresponding to the road sections according to the regional images. The determination module provides a lane changing message to the vehicle according to the congestion levels.Type: ApplicationFiled: April 26, 2023Publication date: November 30, 2023Applicant: PEGATRON CORPORATIONInventors: Yu-Hung Tseng, Ping-Yao Wu, Chia-Wei Chen
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Publication number: 20230386926Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.Type: ApplicationFiled: August 2, 2023Publication date: November 30, 2023Inventors: Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Da-Yuan Lee, Jian-Hao Chen, Chien-Hao Chen, Kuo-Feng Yu, Chia-Wei Chen, Chih-Yu Hsu
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Publication number: 20230376090Abstract: An electronic device with movable foot pad, including a body and a foot pad module, is provided. The body has a bottom surface. The foot pad module includes a first foot pad, at least one second foot pad, and at least one rotating shaft connecting the first and second foot pads. The second foot pad is rotated relative to the first foot pad by the rotating shaft to switch the foot pad module between first and second states. An axial direction of the rotating shaft is inclined relative to the bottom surface. In the first state, the body is supported on the platform by the first and second foot pads. In the second state, the second foot pad is rotated 180 degrees relative to the first foot pad in the axial direction and protrudes from the first foot pad to support the body on the platform by the second foot pad.Type: ApplicationFiled: May 18, 2023Publication date: November 23, 2023Applicant: COMPAL ELECTRONICS, INC.Inventors: I-Hsuan Tsai, Chia-Wei Chen, Yu-Sheng Lai, Tzu-Chien Lai
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Publication number: 20230376653Abstract: A neural network is used to place macros on a chip canvas in an integrated circuit (IC) design. The macros are first clustered into multiple macro clusters. Then the neural network generates a probability distribution over locations on a grid and aspect ratios of a macro cluster. The grid represents the chip canvas and is formed by rows and columns of grid cells. The macro cluster is described by at least an area size, aspect ratios, and wire connections. Action masks are generated for respective ones of the aspect ratios to block out a subset of unoccupied grid cells based on design rules that optimize macro placement. Then, by applying the action masks on the probability distribution, a masked probability distribution is generated. Based on the masked probability distribution, a location on the grid is selected for placing the macro cluster with a chosen aspect ratio.Type: ApplicationFiled: May 11, 2023Publication date: November 23, 2023Inventors: Hsin-Chuan Kuo, Chia-Wei Chen, Yu-Hsiu Lin, Kun-Yu Wang, Sheng-Tai Tseng, Chun-Ku Ting, Fang-Ming Yang, Yu-Hsien Ku, Jen-Wei Lee, Ronald Kuo-Hua Ho, Chun-Chieh Wang, Yi-Ying Liao, Tai-Lai Tung, Ming-Fang Tsai, Chun-Chih Yang, Chih-Wei Ko, Kun-Chin Huang
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Publication number: 20230376671Abstract: A neural network based method places flexible blocks on a chip canvas in an integrated circuit (IC) design. The neural network receives an input describing geometric features of a flexible block to be placed on the chip canvas. The geometric features includes an area size and multiple aspect ratios. The neural network generates a probability distribution over locations on the chip canvas and the aspect ratios of the flexible block. Based on the probability distribution, a location on the chip canvas is selected for placing the flexible block with a chosen aspect ratio.Type: ApplicationFiled: May 11, 2023Publication date: November 23, 2023Inventors: Jen-Wei Lee, Yi-Ying Liao, Te-Wei Chen, Yu-Hsiu Lin, Chia-Wei Chen, Chun-Ku Ting, Sheng-Tai Tseng, Ronald Kuo-Hua Ho, Hsin-Chuan Kuo, Chun-Chieh Wang, Ming-Fang Tsai, Chun-Chih Yang, Tai-Lai Tung, Da-Shan Shiu