Patents by Inventor Chia Wei CHOU

Chia Wei CHOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230242594
    Abstract: Provided herein are engineered Coronavirus S proteins, such as engineered SARS-CoV-2 S proteins. In some aspects, the engineered S proteins exhibit enhanced conformational stability and/or antigenicity. Methods are also provided for use of engineered proteins as diagnostics, in screening platforms and/or in vaccine compositions.
    Type: Application
    Filed: May 28, 2021
    Publication date: August 3, 2023
    Applicants: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, THE TRUSTEES OF DARTMOUTH COLLEGE
    Inventors: Jason MCLELLAN, Jennifer MAYNARD, Andrea CHASSE, Ilya FINKELSTEIN, Mohammad JAVANMARDI, Jeffrey SCHAUB, Hung-Che KUO, Chia-Wei CHOU, Jory GOLDSMITH, Christy HJORTH, Ching-Lin HSIEH, Patrick BYRNE, Nicole JOHNSON, Nianshuang WANG, Daniel WRAPP
  • Patent number: 11431268
    Abstract: A motor driving system includes a controller, motors and motor drivers. In the normal supplying state of a power supply, the controller controls the motor drivers. The motor drivers output driving signals for driving the motors respectively. In an abnormal state or a power-off state of the power supply, one of the motor drivers is set to be a master driver and the others are set to be slave driver. The master driver activates a deceleration energy backup (DEB) function, powers the slave drivers through a common-DC-bus structure, controls the slave drivers, and during deceleration maintains a ratio between frequencies of the driving signals, until all of the motors are decelerated to stop at the same time.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: August 30, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Cheng-Yun Lin, Chia-Wei Chou, Chen-Hsiang Kuo
  • Publication number: 20220069744
    Abstract: A motor driving system includes a controller, motors and motor drivers. In the normal supplying state of a power supply, the controller controls the motor drivers. The motor drivers output driving signals for driving the motors respectively. In an abnormal state or a power-off state of the power supply, one of the motor drivers is set to be a master driver and the others are set to be slave driver. The master driver activates a deceleration energy backup (DEB) function, powers the slave drivers through a common-DC-bus structure, controls the slave drivers, and during deceleration maintains a ratio between frequencies of the driving signals, until all of the motors are decelerated to stop at the same time.
    Type: Application
    Filed: May 11, 2021
    Publication date: March 3, 2022
    Inventors: Cheng-Yun LIN, Chia-Wei CHOU, Chen-Hsiang KUO
  • Patent number: 10470323
    Abstract: A hinge structure includes a first base, a second base, a first linking rod, a second linking rod, and a torque assembly. The first linking rod has a first pivot part, a first sliding part, and a second pivot part. The first pivot part is pivoted to the first base, and the first sliding part is slidably connected to the second base. The second linking rod has a second sliding part, a shaft part, a third pivot part, and a fourth pivot part. The second sliding part is slidably connected to the first base. The third pivot part is pivoted to the second base. The second pivot part is pivoted to the fourth pivot part. The torque assembly has a sleeve part sleeved on the shaft part and a connection part connected to the second base. The sleeve part generates torque during rotation with respect to the shaft part.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: November 5, 2019
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Hsien-Hung Cheng, You-Yu Chen, Chia-Wei Chou, Po-Yi Chang, Cheng-Yo Hsiao, Wei-Ting Liu
  • Patent number: 10263089
    Abstract: A transistor including a substrate, a gate layer, a first insulating layer, an active layer, a source and a drain is provided. The gate layer is disposed on the first insulating layer, and has a plurality of first through holes. The first insulating layer covers the gate layer and a part of the substrate exposed by the first through holes, and forms a plurality of recesses respectively corresponding to the first through holes. The active layer is disposed on the first insulating layer, and has a plurality of second through holes. The second through holes communicate with the recesses, respectively. The source is disposed on a part of the active layer. The drain is disposed on another part of the active layer. A manufacturing method of the transistor is also provided.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: April 16, 2019
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chia-Wei Chou, Cheng-Hang Hsu
  • Publication number: 20190021179
    Abstract: A hinge structure includes a first base, a second base, a first linking rod, a second linking rod, and a torque assembly. The first linking rod has a first pivot part, a first sliding part, and a second pivot part. The first pivot part is pivoted to the first base, and the first sliding part is slidably connected to the second base. The second linking rod has a second sliding part, a shaft part, a third pivot part, and a fourth pivot part. The second sliding part is slidably connected to the first base. The third pivot part is pivoted to the second base. The second pivot part is pivoted to the fourth pivot part. The torque assembly has a sleeve part sleeved on the shaft part and a connection part connected to the second base. The sleeve part generates torque during rotation with respect to the shaft part.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 17, 2019
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Hsien-Hung Cheng, You-Yu Chen, Chia-Wei Chou, Po-Yi Chang, Cheng-Yo Hsiao, Wei-Ting Liu
  • Publication number: 20160064499
    Abstract: A transistor including a substrate, a gate layer, a first insulating layer, an active layer, a source and a drain is provided. The gate layer is disposed on the first insulating layer, and has a plurality of first through holes. The first insulating layer covers the gate layer and a part of the substrate exposed by the first through holes, and forms a plurality of recesses respectively corresponding to the first through holes. The active layer is disposed on the first insulating layer, and has a plurality of second through holes. The second through holes communicate with the recesses, respectively. The source is disposed on a part of the active layer. The drain is disposed on another part of the active layer. A manufacturing method of the transistor is also provided.
    Type: Application
    Filed: May 8, 2015
    Publication date: March 3, 2016
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chia-Wei Chou, Cheng-Hang Hsu
  • Patent number: 8923027
    Abstract: A five-level DC-AC converter includes a capacitor set and a full-bridge circuit. The capacitor set contains two DC capacitors, a power electronic switch and two diodes. When the power electronic switch is turned on/off, the two DC capacitors are connected in series/parallel to provide a two-level DC voltage to the full-bridge circuit. The full-bridge circuit further converts the two-level DC voltage to output a voltage with three voltage levels in the positive half cycle and three voltage levels in the negative half cycle. This achieves the goal of using five power electronic switches to convert DC power into AC power with five voltage levels.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: December 30, 2014
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Ming-Pin Mai, Chia-Wei Chou, Mao-Jang He
  • Publication number: 20130033912
    Abstract: A five-level DC-AC converter includes a capacitor set and a full-bridge circuit. The capacitor set contains two DC capacitors, a power electronic switch and two diodes. When the power electronic switch is turned on/off, the two DC capacitors are connected in series/parallel to provide a two-level DC voltage to the full-bridge circuit. The full-bridge circuit further converts the two-level DC voltage to output a voltage with three voltage levels in the positive half cycle and three voltage levels in the negative half cycle. This achieves the goal of using five power electronic switches to convert DC power into AC power with five voltage levels.
    Type: Application
    Filed: February 13, 2012
    Publication date: February 7, 2013
    Inventors: Chin-Chang Wu, Wen-Jung Chiang, Ming-Pin Mai, Chia-Wei Chou, Mao-Jang He
  • Publication number: 20120088653
    Abstract: A method of providing solar cell electrode by electroless plating and an activator used therein are disclosed. The method of the present invention can be performed without silver paste, and comprises steps: (A) providing a silicon substrate; (B) contacting the silicon substrate with an activator, wherein the activator comprises: a noble metal or a noble metal compound, a thickening agent, and water; (C) washing the silicon substrate by a cleaning agent; (D) dipping the silicon substrate in an electroless nickel plating solution to perform electroless plating. The method of providing solar cell electrode by electroless plating of the present invention has high selectivity between silicon nitride and silicon, large working window, and is steady, easily to be controlled, therefore is suitable for being used in the fabrication of the electrodes of the solar cell substrate.
    Type: Application
    Filed: December 20, 2011
    Publication date: April 12, 2012
    Applicant: E-CHEM ENTERPRISE CORP.
    Inventors: Chia Wei CHOU, Su-Fei Hsu, Michael Liu
  • Publication number: 20110192316
    Abstract: An electroless nickel plating solution for solar cell electrode, which comprises SiNx and Si patterned structure, is disclosed. The electroless plating solution of the present invention comprises: nickel ion; a reducing agent; a first chelating agent; a second chelating agent; and water. The electroless plating solution of the present invention has high selectivity between Si and SiNx and is harmless to the aluminum-based layer, therefore is suitable for being used in the fabrication of the electrodes of the solar cell.
    Type: Application
    Filed: January 26, 2011
    Publication date: August 11, 2011
    Applicant: E-CHEM ENTERPRISE CORP.
    Inventors: Chia Wei CHOU, Su-Fei HSU, Michael LIU
  • Publication number: 20110195542
    Abstract: A method of providing solar cell electrode by electroless plating and an activator used therein are disclosed. The method of the present invention can be performed without silver paste, and comprises steps: (A) providing a silicon substrate; (B) contacting the silicon substrate with an activator, wherein the activator comprises: a noble metal or a noble metal compound, a thickening agent, and water; (C) washing the silicon substrate by a cleaning agent; (D) dipping the silicon substrate in an electroless nickel plating solution to perform electroless plating. The method of providing solar cell electrode by electroless plating of the present invention has high selectivity between silicon nitride and silicon, large working window, and is steady, easily to be controlled, therefore is suitable for being used in the fabrication of the electrodes of the solar cell substrate.
    Type: Application
    Filed: January 26, 2011
    Publication date: August 11, 2011
    Applicant: E-CHEM ENTERPRISE CORP.
    Inventors: Chia Wei Chou, Su-Fei Hsu, Michael Liu