Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.

Abstract: A planar magnetic component is arranged on a circuit board of a resonant converter, and the resonant converter includes a primary-side circuit and a secondary-side circuit. The planar magnetic component includes an inductor trace, an inductor iron core, and a current transformer trace. The inductor trace is arranged on the primary-side circuit and formed one layer board of the circuit board to serve as a resonant inductor coupled to the primary-side circuit. The inductor iron core includes a core pillar, and the core pillar penetrates a through hole of the circuit board, and the inductor trace surrounds the through hole. The current transformer trace is formed on the circuit board to serve as a current transformer coil coupled to the resonant inductor. The current transformer trace surrounds the through hole to form a common-core structure that shares the inductor iron core.

Abstract: A development system and a method of an offline software-in-the-loop simulation are disclosed. A common firmware architecture generates a chip control program. The common firmware architecture has an application layer and a hardware abstraction layer. The application layer has a configuration header file and a product program. A processing program required by a peripheral module is added to the hardware abstraction layer during compiling. The chip control program is provided to a controller chip or a circuit simulation software to be executed to control the product-related circuit through controlling the peripheral module.

Abstract: A development system and a method of an offline software-in-the-loop simulation are disclosed. A common firmware architecture generates a chip control program. The common firmware architecture has an application layer and a hardware abstraction layer. The application layer has a configuration header file and a product program. A processing program required by a peripheral module is added to the hardware abstraction layer during compiling. The chip control program is provided to a controller chip or a circuit simulation software to be executed to control the product-related circuit through controlling the peripheral module.

Abstract: The present invention relates to pharmaceutical compositions, which contain a HMG-CoA reductase inhibitor selected from the group consisting of pravastatin, simvastatin, lovastatin, pitavastatin and ZD-4522 and an angiotensin II receptor antagonist and optionally further contain a calcium channel blocker. The compositions are for prevention or treatment of cardiac failure.

Abstract: The present invention relates to pharmaceutical compositions, which contain a HMG-CoA reductase inhibitor selected from the group consisting of pravastatin, simvastatin, lovastatin, pitavastatin and ZD-4522 and an angiotensin II receptor antagonist and optionally further contain a calcium channel blocker. The compositions are for prevention or treatment of cardiac failure.