Abstract: Present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor fin and a metal gate. The semiconductor fin has a first portion and a second portion over the first portion. A height of the second portion is greater than a width of the second portion. The metal gate has a bottom portion, an upper portion, and a lateral portion connecting the bottom portion and the upper portion. The bottom portion is between the first portion and the second portion of the semiconductor fin, and the upper portion is over the second portion of the semiconductor fin.

Abstract: A heterostructure may include a substrate having a first primary surface, a second primary surface, and a diffusion layer extending a depth into the substrate from the first primary surface; and a deposition layer disposed on the second primary surface of the substrate. The heterostructure may further include an epitaxial layer disposed on the deposition layer.

Abstract: A laminar structure of semiconductors comprises a silicon substrate, an epitaxial layer, a protective layer, a first layer and a second layer. The epitaxial layer is arranged above the silicon substrate and the protective layer is arranged below the silicon substrate. Thermal expansion coefficients of the epitaxial layer and the protective layer are both either greater than or less than that of the silicon substrate. The first layer is arranged between the silicon substrate and the protective layer; and the second layer is arranged between the silicon substrate and the epitaxial layer, wherein the band gap of the first layer and the second layer are both greater than 3 eV. By arranging the protective layer below the silicon substrate, stress generated between the silicon substrate and the epitaxial layer can be reduced to prevent occurrence of bending or crack. Therefore, yield can be promoted and costs can be reduced.

Abstract: A heterostructure may include a substrate having a first primary surface, a second primary surface, and a diffusion layer extending a depth into the substrate from the first primary surface; and a deposition layer disposed on the second primary surface of the substrate. The heterostructure may further include an epitaxial layer disposed on the deposition layer.

Abstract: A laminar structure of semiconductors comprises a substrate, an epitaxial layer, a protective layer, a first layer and a second layer. The epitaxial layer is arranged above the substrate and the protective layer is arranged below the substrate. Thermal expansion coefficients of the epitaxial layer and the protective layer are simultaneously greater than or less than that of the substrate. The first layer is arranged between the substrate and the protective layer; and the second layer is arranged between the substrate and the epitaxial layer, wherein the band gap of the first layer and the second layer are both greater than 3 eV. By a protective layer arranged below the substrate, stress generated between the substrate and the epitaxial layer can be reduced to prevent occurrence of bending or crack. Therefore, yield can be promoted and costs can be reduced. A manufacturing method thereof is also herein provided.