Patents by Inventor Chia-Wen Lien

Chia-Wen Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11112366
    Abstract: A reagent for enhancing a chemiluminescent reaction includes luminol or luminol derivatives, an oxidant, an electron mediator, and an enhancer. The enhancer is a nitrogen-containing fused heterocyclic compound having at least two nitrogen atoms. The present disclosure further provides a kit for enhancing a chemiluminescent reaction comprising the foregoing reagent.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 7, 2021
    Assignee: NATIONAL TAIWAN OCEAN UNIVERSITY
    Inventors: Chih-Ching Huang, Chia-Wen Lien
  • Publication number: 20200309707
    Abstract: A reagent for enhancing a chemiluminescent reaction includes luminol or luminol derivatives, an oxidant, an electron mediator, and an enhancer. The enhancer is a nitrogen-containing fused heterocyclic compound having at least two nitrogen atoms. The present disclosure further provides a kit for enhancing a chemiluminescent reaction comprising the foregoing reagent.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 1, 2020
    Applicant: NATIONAL TAIWAN OCEAN UNIVERSITY
    Inventors: Chih-Ching HUANG, Chia-Wen LIEN
  • Patent number: 10711185
    Abstract: A reagent for performing a chemiluminescent reaction includes luminol or luminol derivatives, an oxidant, an electron mediator, and an enhancer. The enhancer is a nitrogen-containing fused heterocyclic compound having at least two nitrogen atoms. The present disclosure further provides a kit for performing a chemiluminescent reaction comprising the aforesaid reagent.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: July 14, 2020
    Assignee: BIO-HELIX CO., LTD.
    Inventors: Cheng-Yen Lee, Chia-Wen Lien
  • Publication number: 20200017764
    Abstract: A reagent for performing a chemiluminescent reaction includes luminol or luminol derivatives, an oxidant, an electron mediator, and an enhancer. The enhancer is a nitrogen-containing fused heterocyclic compound having at least two nitrogen atoms. The present disclosure further provides a kit for performing a chemiluminescent reaction comprising the aforesaid reagent.
    Type: Application
    Filed: July 13, 2018
    Publication date: January 16, 2020
    Applicant: BIO-HELIX CO., LTD.
    Inventors: Cheng-Yen LEE, Chia-Wen LIEN
  • Publication number: 20190031881
    Abstract: A reactive black dye composition is disclosed, which comprises: (A) a reactive blue dye represented by the following formula (I) or a salt thereof; and (B) a reactive red dye or a salt thereof, a reactive yellow dye or a salt thereof, or a combination thereof. Herein, R11, X1, X2, X31, X41 and n are defined in the specification. In addition, a method for dying fibers using the aforesaid reactive black dye composition is also disclosed.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 31, 2019
    Inventors: Chien-Yu CHEN, Hong-Chang HUANG, Chia-Wen LIEN, Cheng-Hsiang HSU, Tz-Yi WU
  • Patent number: 9972554
    Abstract: A wafer level chip scale package (WLCSP) has a device chip, a carrier chip, an offset pad, a conductive spacing bump and a through hole via (THV). The device chip is attached to the carrier chip. The offset pad is disposed on a first surface of the device chip. The conductive spacing bump is formed on the offset pad. The through hole via includes a through hole and a hole metal layer. The through hole penetrates through the carrier chip and the device chip, and the hole metal layer is formed in the through hole and in contact with the offset pad.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: May 15, 2018
    Assignee: POWERTECH TECHNOLOGY INC.
    Inventors: Li-Chih Fang, Chia-Chang Chang, Hung-Hsin Hsu, Wen-Hsiung Chang, Kee-Wei Chung, Chia-Wen Lien
  • Publication number: 20170256471
    Abstract: A wafer level chip scale package (WLCSP) has a device chip, a carrier chip, an offset pad, a conductive spacing bump and a through hole via (THV). The device chip is attached to the carrier chip. The offset pad is disposed on a first surface of the device chip. The conductive spacing bump is formed on the offset pad. The through hole via includes a through hole and a hole metal layer. The through hole penetrates through the carrier chip and the device chip, and the hole metal layer is formed in the through hole and in contact with the offset pad.
    Type: Application
    Filed: February 15, 2017
    Publication date: September 7, 2017
    Inventors: Li-Chih Fang, Chia-Chang Chang, Hung-Hsin Hsu, Wen-Hsiung Chang, Kee-Wei Chung, Chia-Wen Lien
  • Patent number: 8776363
    Abstract: A method for supporting a semiconductor wafer includes providing a device wafer to a magnetizable ring, providing a magnetizable carrier to the device wafer, and magnetizing the magnetizable ring and the magnetizable carrier to form a magnetized clamp having a magnetized ring and magnetized carrier. The magnetized clamp securely clamps the device wafer therebetween.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: July 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chang-Sheng Hsu, Li-Che Chen, Kuo-Yuh Yang, Chia-Wen Lien, Yan-Da Chen
  • Patent number: 8754504
    Abstract: A thinning method of a wafer is provided. The method includes the following steps. First, a wafer having a first surface, a second surface, and a side surface is provided, and the side surface is connected between the first surface and the second surface. At least one semiconductor device is formed on the first surface. Then, an anisotropy etching process is performed to the second surface with a mask to remove portions of the wafer while remaining the side surface thereby forming a number of grooves in the second surface and at least one reinforcing wall between the grooves. As a result, a thinned wafer is obtained.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: June 17, 2014
    Assignee: United Microelectronics Corporation
    Inventors: Chang-Sheng Hsu, Kuo-Yuh Yang, Kuo-Hsiung Huang, Yan-Da Chen, Chia-Wen Lien
  • Publication number: 20130312246
    Abstract: A method for supporting a semiconductor wafer includes providing a device wafer to a magnetizable ring, providing a magnetizable carrier to the device wafer, and magnetizing the magnetizable ring and the magnetizable carrier to form a magnetized clamp having a magnetized ring and magnetized carrier. The magnetized clamp securely clamps the device wafer therebetween.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 28, 2013
    Inventors: Chang-Sheng Hsu, Li-Che Chen, Kuo-Yuh Yang, Chia-Wen Lien, Yan-Da Chen
  • Publication number: 20130313691
    Abstract: A thinning method of a wafer is provided. The method includes the following steps. First, a wafer having a first surface, a second surface, and a side surface is provided, and the side surface is connected between the first surface and the second surface. At least one semiconductor device is formed on the first surface. Then, an anisotropy etching process is performed to the second surface with a mask to remove portions of the wafer while remaining the side surface thereby forming a number of grooves in the second surface and at least one reinforcing wall between the grooves. As a result, a thinned wafer is obtained.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 28, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Chang-Sheng Hsu, Kuo-Yuh Yang, Kuo-Hsiung Huang, Yan-Da Chen, Chia-Wen Lien
  • Patent number: 8536709
    Abstract: A wafer with a eutectic bonding carrier and a method of manufacturing the same are disclosed, wherein the wafer comprises a thinned wafer, a eutectic bonding layer formed on the backside of said thinned wafer, a eutectic bonding carrier attached on said eutectic bonding layer, and a plurality of openings formed at the active side of said thinned wafer and exposing said eutectic bonding layer on the backside of said thinned wafer.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: September 17, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chang-Sheng Hsu, Kuo-Yuh Yang, Li-Che Chen, Yan-Da Chen, Chia-Wen Lien