Abstract: A detector for detecting and simultaneously diagnosing at least one subtype of human papilloma viruses (HPV) contained in a biological sample is provided. The detector comprises: a carrier, a plurality of micro-dots immobilized on the carrier, wherein each micro-dot is for identifying one particular HPV subtype, and the HPV subtype is one selected from a group consisting of 39 different HPV subtypes; and at least one oligonucleotide sequence contained in each the micro-dot that is specific to the one particular HPV subtype, wherein the at least one oligonucleotide sequence serves as a detection probe that hybridizes specifically with an L1 gene sequence of the one particular HPV subtype to form a hybridization complex as a detection indicator, so that each micro-dot identifies one particular HPV subtype via a corresponding oligonucleotide of the one particular HPV subtype, and thereby detecting and simultaneously identifying subtypes of human papilloma viruses.

Abstract: A detector for detecting and simultaneously diagnosing at least one subtype of human papilloma viruses (HPV) contained in a biological sample is provided. The detector comprises: a carrier, a plurality of micro-dots immobilized on the carrier, wherein each micro-dot is for identifying one particular HPV subtype, and the HPV subtype is one selected from a group consisting of 39 different HPV subtypes; and at least one oligonucleotide sequence contained in each the micro-dot that is specific to the one particular HPV subtype, wherein the at least one oligonucleotide sequence serves as a detection probe that hybridizes specifically with an L1 gene sequence of the one particular HPV subtype to form a hybridization complex as a detection indicator, so that each micro-dot identifies one particular HPV subtype via a corresponding oligonucleotide of the one particular HPV subtype, and thereby detecting and simultaneously identifying subtypes of human papilloma viruses.

Abstract: A multi-layer substrate for an IC chip having a plurality of pads comprises a first layer having a plurality of conducting lines electrically connected to the pads of the IC chip, whereby a first current is generated in the conducting lines, and a second layer has a ground plane electrically connected to a ground, and a plurality of via holes penetrating the second layer and the conducting plane, wherein the via holes are arranged to make a second current in the conducting plane induced by the first current flowing to the ground.

Abstract: A method for reducing electrical noise inside a ball grid array package for installing capacitors between a plurality of power pads and ground pads on a top side of a substrate of the ball grid array package coats solder paste on the plurality of power pads and ground pads, coats adhesive glue beneath the plurality of capacitors, fixes the plurality of capacitors on the power pads and ground pads with the adhesive glue and solder paste, and solidifies the adhesive glue in a reflow soldering stove.