Abstract: Devices with aluminum structures and methods of fabrication are provided. An exemplary device includes an interconnect structure and an aluminum structure electrically connected to the interconnect structure. The aluminum structure includes a first aluminum layer, a migration barrier layer over the first aluminum layer, and a second aluminum layer over the migration barrier layer.

Abstract: A photolithographic apparatus includes a particle removing cassette, a pump and a compressor. The particle removing cassette includes a first slit that includes an array of parallel wind blade nozzles arranged along a length of the first slit, protruding from the first slit, and configured to eject and direct pressurized cleaning material to a patterning surface of a mask to remove debris particles on the patterning surface. The pump and the compressor are controlled by a controller to adjust a flow rate and a pressure of the pressurized cleaning material based on an amount of debris particles on the patterning surface of the mask.

Abstract: In an exemplary aspect, the present disclosure is directed to a device. The device includes a fin-shaped structure extending lengthwise along a first direction. The fin-shaped structure includes a stack of semiconductor layers arranged one over another along a second direction perpendicular to the first direction. The device also includes a first source/drain feature of a first dopant type on the fin-shaped structure and spaced away from the stack of semiconductor layers. The device further includes a second source/drain feature of a second dopant type on the fin-shaped structure over the first source/drain feature along the second direction and connected to the stack of semiconductor layers. The second dopant type is different from the first dopant type. Furthermore, the device additionally includes an isolation feature interposing between the first source/drain feature and the second source/drain features.

Abstract: A method of building a knowledge graph, performed by a processing device, includes: classifying news articles to a main event associated with sub events, using the main event as a first node of the knowledge graph, using the sub events as second nodes of the knowledge graph respectively, connecting the second nodes to the first node, extracting event summaries from the news articles respectively according to a template, using the event summaries as third nodes of the knowledge graph respectively, and connecting each of the third nodes to one of the second nodes according to association between the event summaries and the sub events, extracting commenter identities from the event summaries, and using the commenter identities as fourth nodes of the knowledge graph, and connecting each of the fourth nodes to one of the third nodes.

Abstract: Antigen binding molecules (ABMs) comprising Fab domains in non-native configurations, ABM conjugates comprising the ABMs and cytotoxic or cytostatic agents, pharmaceutical compositions containing the ABMs and ABM conjugates, methods of using the ABMs, ABM conjugates and pharmaceutical compositions for treating cancer, nucleic acids encoding the ABMs, cells engineered to express the ABMs, and methods of producing ABMs.

Abstract: An electronic package is provided in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure is embedded in the packaging layer. Therefore, thermal stress is dispersed through the frame body to avoid warpage of the electronic package, so as to facilitate the arrangement of other electronic components around the electronic component.

Abstract: The present invention provides multispecific antigen-binding molecules that bind both a T-cell antigen (e.g., CD3) and a target antigen (e.g., a tumor associated antigen, a viral or bacterial antigen), and which include a single polypeptide chain that is multivalent (e.g., bivalent) with respect to T-cell antigen binding, and uses thereof.

Abstract: A semiconductor device includes a plurality of nanostructures extending in a first direction above a semiconductor substrate and arranged in a second direction substantially perpendicular to the first direction and a gate structure extending in a third direction perpendicular to both the first and second directions, the gate structure surrounding each of the plurality of nano structures. Each of the plurality of nanostructures has an outer region having a composition different from a composition of an inner region of each of the plurality of the nanostructures. The gate structure includes a plurality of high-k gate dielectric layers respectively surrounding the plurality of nanostructures, a work function layer surrounding each of the plurality of high-k gate dielectric layers and a fill metal layer surrounding the work function layer.

Abstract: The present disclosure relates to multispecific molecules comprising a peptide-MHC complex and an immune cell antigen targeting moiety. Particular aspects relate to multimeric (e.g., dimeric) molecules comprising a peptide-MHC complex, an immune cell antigen targeting moiety, and a multimerization moiety. The disclosure further provides pharmaceutical compositions comprising the multispecific molecules, and methods of use of multispecific molecules in antigen-specific T cell activation, in inducing an antigen-specific immune response, and in therapeutic applications, as well as nucleic acids encoding the multispecific molecules, recombinant cells that express the multispecific molecules, and methods of producing the multispecific molecules.

Abstract: The present invention provides multispecific antigen-binding molecules that bind both a T-cell antigen (e.g., CD3) and a target antigen (e.g., a tumor associated antigen, a viral or bacterial antigen), and which include a single polypeptide chain that is multivalent (e.g., bivalent) with respect to T-cell antigen binding, and uses thereof.

Abstract: A frame rate control method is provided. A primary scenario and a non-primary scenario are identified according to two or more windows displayed on a screen. Each of the primary scenario and the non-primary scenario is performed by an individual application. A frame rate of the non-primary scenario is decreased when a performance index indicates that a first condition is present. The application corresponding to the non-primary scenario is disabled when the performance index indicates that a second condition is present after decreasing the frame rate of the non-primary scenario, so as to remove the window corresponding to the non-primary scenario from the screen.

Abstract: In a method of manufacturing a semiconductor device, a fin structure, which includes a stacked layer of first semiconductor layers and second semiconductor layers disposed over a bottom fin structure and a hard mask layer over the stacked layer, is formed. An isolation insulating layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer is formed. A second dielectric layer is formed over the first dielectric layer. The second dielectric layer is recessed. A third dielectric layer is formed on the recessed second dielectric layer. The third dielectric layer is partially removed to form a trench. A fourth dielectric layer is formed by filling the trench with a dielectric material, thereby forming a wall fin structure.

Abstract: Embodiments utilize a two layer inner spacer structure during formation of the inner spacers of a nano-FET device. The materials of the first inner spacer layer and second inner spacer layer can be selected to have a mismatch in their coefficients of thermal expansion (CTE). As the structure cools after deposition, the inner spacer layer which has a larger CTE will exhibit compressive stress on the other inner spacer layer, however, because the two layers have a common interface, the layer with the smaller CTE will exhibit a counter acting tensile stress.

Abstract: This disclosure relates to a superlattice structure, an LED epitaxial structure, a display device, and a method for manufacturing the LED epitaxial structure. The superlattice structure includes at least two superlattice units which are grown in stacking layers. Each of the at least two superlattice units includes a first n-type GaN layer, a second n-type GaN layer, a first n-type GaInN layer, and a second n-type GaInN layer which are grown in stacking layers. The first n-type GaN layer has a doping concentration which is constant along a growth direction, the second n-type GaN layer has a doping concentration which gradually increases along the growth direction, the first n-type GaInN layer has a doping concentration which gradually decreases along the growth direction, and the second n-type GaInN layer has a doping concentration which is constant along the growth direction.

Abstract: An electronic package and a manufacturing method of the electronic package are provided, in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure nor cover the electronic component is embedded in the packaging layer.

Abstract: According to certain embodiments, the present disclosure provides bispecific antigen-binding molecules comprising a first antigen-binding domain that specifically binds a target antigen and a second antigen binding domain that binds a complement component. In certain embodiments, the bispecific antigen-binding molecules of the present disclosure are capable of binding to the target antigen with an EC50 of about 10 nM or less, and/or are capable of promoting complement deposition on the target antigen with an EC50 of about 10 nM. In certain embodiments, the bispecific antigen-binding molecules of the disclosure are useful for treating diseases in which inhibition or reduction of the growth of an infectious agent or cancer cell is desired and/or therapeutically beneficial.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first nanostructure stacked over and spaced apart from a second nanostructure, a gate stack wrapping around the first nanostructure and the second nanostructure, a source/drain feature adjoining the first nanostructure and the second nanostructure, and a first inner spacer layer interposing the gate stack and the source/drain feature and interposing the first nanostructure and the second nanostructure. A dopant in the source/drain feature has a first concentration at an interface between the first inner spacer layer and the source/drain feature and a second concentration at a first distance away from the interface. The first concentration is higher than the second concentration.

Abstract: The present disclosure relates to molecules capable of binding to FGFR3 and methods of use thereof.

Abstract: Semiconductor devices including backside vias with enlarged backside portions and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure in a first device layer; a front-side interconnect structure on a front-side of the first device layer; a first dielectric layer on a backside of the first device layer; a first contact extending through the first dielectric layer to a source/drain region of the first transistor structure; and a backside interconnect structure on a backside of the first dielectric layer and the first contact, the first contact including a first portion having first tapered sidewalls and a second portion having second tapered sidewalls, widths of the first tapered sidewalls narrowing in a direction towards the backside interconnect structure, and widths of the second tapered sidewalls widening in a direction towards the backside interconnect structure.