Patents by Inventor Chia Yao Chen

Chia Yao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941873
    Abstract: In various examples, sensor data may be received that represents a field of view of a sensor of a vehicle located in a physical environment. The sensor data may be applied to a machine learning model that computes both a set of boundary points that correspond to a boundary dividing drivable free-space from non-drivable space in the physical environment and class labels for boundary points of the set of boundary points that correspond to the boundary. Locations within the physical environment may be determined from the set of boundary points represented by the sensor data, and the vehicle may be controlled through the physical environment within the drivable free-space using the locations and the class labels.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: March 26, 2024
    Assignee: NVIDIA Corporation
    Inventors: Mansi Rankawat, Jian Yao, Dong Zhang, Chia-Chih Chen
  • Publication number: 20230246568
    Abstract: Disclosed is an object table for holding an object, comprising: an electrostatic clamp arranged to clamp the object on the object table; a neutralizer arranged to neutralize a residual charge of the electrostatic clamp; a control unit arranged to control the neutralizer, wherein the residual charge is an electrostatic charge present on the electrostatic clamp when no voltage is applied to the electrostatic clamp.
    Type: Application
    Filed: April 10, 2023
    Publication date: August 3, 2023
    Applicant: ASML Netherlands B.V.
    Inventors: Jan-Gerard Cornelis VAN DER TOORN, Jeroen Gertruda Antonius HUINCK, Han Willem Hendrik SEVERT, Allard Eelco KOOIKER, Michael Johannes Christiaan RONDE, Arno Maria WELLINK, Shibing LIU, Ying LUO, Yixiang WANG, Chia-Yao CHEN, Bohang ZHU, Jurgen VAN SOEST
  • Patent number: 11637512
    Abstract: Disclosed is an object table for holding an object, comprising: an electrostatic clamp arranged to clamp the object on the object table; a neutralizer arranged to neutralize a residual charge of the electrostatic clamp; a control unit arranged to control the neutralizer, wherein the residual charge is an electrostatic charge present on the electrostatic clamp when no voltage is applied to the electrostatic clamp.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 25, 2023
    Assignee: ASML Netherlands B.V.
    Inventors: Jan-Gerard Cornelis Van Der Toorn, Jeroen Gertruda Antonius Huinck, Han Willem Hendrik Severt, Allard Eelco Kooiker, Michaël Johannes Christiaan Ronde, Arno Maria Wellink, Shibing Liu, Ying Luo, Yixiang Wang, Chia-Yao Chen, Bohang Zhu, Jurgen Van Soest
  • Publication number: 20210313908
    Abstract: Disclosed is an object table for holding an object, comprising: an electrostatic clamp arranged to clamp the object on the object table; a neutralizer arranged to neutralize a residual charge of the electrostatic clamp; a control unit arranged to control the neutralizer, wherein the residual charge is an electrostatic charge present on the electrostatic clamp when no voltage is applied to the electrostatic clamp.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Jan-Gerard Cornelis VAN DER TOORN, Jeroen Gertruda Antonius HUINCK, Han Willem Hendrik SEVERT, Allard Eelco KOOIKER, Michaël Johannes Christiaan RONDE, Arno Maria WELLINK, Shibing LIU, Ying LUO, Yixiang WANG, Chia-Yao CHEN, Bohang ZHU, Jurgen VAN SOEST
  • Patent number: 7049245
    Abstract: A method for manufacturing a semiconductor device that comprises defining a semiconductor substrate, forming a gate oxide on the semiconductor substrate, forming a polycrystalline silicon layer over the gate oxide, forming a tungsten silicide layer over the polycrystalline silicon layer; providing a mask over the tungsten silicide layer, defining the mask to expose at least one portion of the tungsten silicide layer, etching the exposed tungsten silicide layer with a first etchant, wherein some tungsten silicide layer remains, etching the remaining tungsten silicide layer with a second etchant to expose at least one portion of the polycrystalline silicon layer, annealing the tungsten silicide layer, etching the exposed polycrystalline silicon layer, and oxidizing sidewalls of the tungsten silicide layer and the polycrystalline silicon layer.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: May 23, 2006
    Assignee: ProMOS Technologies, Inc.
    Inventors: Fang-Yu Yeh, Chi Lin, Chia-Yao Chen
  • Publication number: 20050059248
    Abstract: A method for manufacturing a semiconductor device that comprises defining a semiconductor substrate, forming a gate oxide on the semiconductor substrate, forming a polycrystalline silicon layer over the gate oxide, forming a tungsten silicide layer over the polycrystalline silicon layer; providing a mask over the tungsten silicide layer, defining the mask to expose at least one portion of the tungsten silicide layer, etching the exposed tungsten silicide layer with a first etchant, wherein some tungsten silicide layer remains, etching the remaining tungsten silicide layer with a second etchant to expose at least one portion of the polycrystalline silicon layer, annealing the tungsten silicide layer, etching the exposed polycrystalline silicon layer, and oxidizing sidewalls of the tungsten silicide layer and the polycrystalline silicon layer.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 17, 2005
    Inventors: Feng-Yu Yeh, Chi Lin, Chia-Yao Chen
  • Patent number: D506002
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: June 7, 2005
    Assignee: Vaxcel International Trading Co. Ltd.
    Inventor: Chia Yao Chen