Abstract: Methods and apparatus of processing omnidirectional images are disclosed. According to one method, a current set of omnidirectional images converted from each spherical image in a 360-degree panoramic video sequence using a selected projection format is received, where the selected projection format belongs to a projection format group comprising a cubicface format, and the current set of omnidirectional images with the cubicface format consists of six cubic faces. If the selected projection format corresponds to the cubicface format, one or more mapping syntax elements to map the current set of omnidirectional images into a current cubemap image are signaled. The coded data are then provided in a bitstream including said one or more mapping syntax elements for the current set of omnidirectional images.

Abstract: An audio synchronization method includes: receiving a first audio signal from a first recording device; receiving a second audio signal from a second recording device; performing a correlation operation upon the first audio signal and the second audio signal to align a first pattern of the first audio signal and the first pattern of the second audio signal; after the first patterns of the first audio signal and the second audio signal are aligned, calculating a difference between a second pattern of the first audio signal and the second pattern of the second audio signal; and obtaining a starting-time difference between the first audio signal and the second audio signal for audio synchronization according to the difference between the second pattern of the first audio signal and the second pattern of the second audio signal.

Abstract: Methods and apparatus of reconstructing 360 audio/video (AV) file from multiple AV tracks captured by multiple capture devices are disclosed. According to the present invention, for multi-track audio/video data comprising a first and second audio tracks and a first and second video tracks, the first audio track and the first video track are aligned with the second audio track and the second video track by utilizing video synchronization information derived from the first video track and the second video track if the video synchronization information is available. When the video synchronization information is available, the first audio track and the first video track are aligned with the second audio track and the second video track by utilizing the video synchronization information.

Abstract: A video data processing system and an associated method for generating a summarized video of a recorded video are provided. The method includes the steps of: receiving video data and recording-related information generated during recording video data from at least one source; analyzing the recording-related information and extracting required information from the recording-related information to generate metadata information for the received video data; cropping the received video data to generate cropped video data based on the metadata information; and generating a summarized video of the recorded video data based on the cropped video data.

Abstract: A discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) circuit includes a microcode memory, a processor, and a butterfly operation circuit. The microcode memory stores multiple microcode groups corresponding to DCT/IDCT operations and each of the microcode groups includes a series of microcodes. The processor obtains one of the microcode groups corresponding to one of the DCT/IDCT operations to be performed and retrieves microcodes in the obtained microcode group in sequence. The butterfly operation circuit performs butterfly operations according to the retrieved microcodes to execute one of the DCT/IDCT operations.

Abstract: A discrete cosine transformation circuit comprising a pipeline with a memory stage and an arithmetic stage. The arithmetic stage comprises first and second arithmetic logic units (ALU). Each of the ALUs receives from the memory a set of image data, performs a first calculation on the set of image data and outputs calculation result thereof in a first clock cycle. A path in the circuit directs the result to the memory stage, such that at least one ALU can selectively receive the result from the path in a clock cycle subsequent to the first clock cycle.

Abstract: A discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) circuit includes a microcode memory, a processor, and a butterfly operation circuit. The microcode memory stores multiple microcode groups corresponding to DCT/IDCT operations and each of the microcode groups includes a series of microcodes. The processor obtains one of the microcode groups corresponding to one of the DCT/IDCT operations to be performed and retrieves microcodes in the obtained microcode group in sequence. The butterfly operation circuit performs butterfly operations according to the retrieved microcodes to execute one of the DCT/IDCT operations.

Abstract: A discrete cosine transformation circuit comprising a pipeline with a memory stage and an arithmetic stage. The arithmetic stage comprises first and second arithmetic logic units (ALU). Each of the ALUs receives from the memory a set of image data, performs a first calculation on the set of image data and outputs calculation result thereof in a first clock cycle. A path in the circuit directs the result to the memory stage, such that at least one ALU can selectively receive the result from the path in a clock cycle subsequent to the first clock cycle.